/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "sm8150-v2.dtsi"
#include "sa8155.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. SA8155 V2";
	qcom,msm-name = "SA8155 V2";
	qcom,msm-id = <362 0x20000>;
};

&ethqos_hw {
	emac-core-version = <0x20010002>;
};

&emac_hw {
	emac-core-version = <4>;
};

&ufsphy_mem {
	vdda-phy-supply = <&pm8150_1_l5>;
};

/* GPU frequency overrides */
&soc {
	gpu_opp_table_v2: gpu_opp_table_v2 {
		compatible = "operating-points-v2";

		opp-700000000 {
			opp-hz = /bits/ 64 <700000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>;
		};

		opp-675000000 {
			opp-hz = /bits/ 64 <675000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;
		};

		opp-585000000 {
			opp-hz = /bits/ 64 <585000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
		};

		opp-500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
		};

		opp-427000000 {
			opp-hz = /bits/ 64 <427000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;
		};
	};
};

/* GPU power level overrides */
&msm_gpu {
	qcom,initial-pwrlevel = <4>;
	/delete-node/qcom,gpu-pwrlevel-bins;
	qcom,gpu-pwrlevels {
		compatible = "qcom,gpu-pwrlevels";
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,gpu-pwrlevel@0 {
			reg = <0>;
			qcom,gpu-freq = <700000000>;
			qcom,bus-freq = <10>;
			qcom,bus-min = <8>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <675000000>;
			qcom,bus-freq = <8>;
			qcom,bus-min = <7>;
			qcom,bus-max = <9>;
		};

		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <585000000>;
			qcom,bus-freq = <7>;
			qcom,bus-min = <6>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <500000000>;
			qcom,bus-freq = <7>;
			qcom,bus-min = <6>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@4 {
			reg = <4>;
			qcom,gpu-freq = <427000000>;
			qcom,bus-freq = <6>;
			qcom,bus-min = <5>;
			qcom,bus-max = <9>;
		};

		qcom,gpu-pwrlevel@5 {
			reg = <5>;
			qcom,gpu-freq = <0>;
			qcom,bus-freq = <0>;
			qcom,bus-min = <0>;
			qcom,bus-max = <0>;
		};
	};
};

&pcie0 {
	qcom,pcie-phy-ver = <2114>;

	qcom,phy-sequence = <0x0840 0x03 0x0
			0x0094 0x08 0x0
			0x0154 0x34 0x0
			0x016c 0x08 0x0
			0x0058 0x0f 0x0
			0x00a4 0x42 0x0
			0x0110 0x24 0x0
			0x011c 0x03 0x0
			0x0118 0xb4 0x0
			0x010c 0x02 0x0
			0x01bc 0x11 0x0
			0x00bc 0x82 0x0
			0x00d4 0x03 0x0
			0x00d0 0x55 0x0
			0x00cc 0x55 0x0
			0x00b0 0x1a 0x0
			0x00ac 0x0a 0x0
			0x00c4 0x68 0x0
			0x00e0 0x02 0x0
			0x00dc 0xaa 0x0
			0x00d8 0xab 0x0
			0x00b8 0x34 0x0
			0x00b4 0x14 0x0
			0x0158 0x01 0x0
			0x0074 0x06 0x0
			0x007c 0x16 0x0
			0x0084 0x36 0x0
			0x0078 0x06 0x0
			0x0080 0x16 0x0
			0x0088 0x36 0x0
			0x01b0 0x1e 0x0
			0x01ac 0xb9 0x0
			0x01b8 0x18 0x0
			0x01b4 0x94 0x0
			0x0050 0x07 0x0
			0x0010 0x00 0x0
			0x001c 0x31 0x0
			0x0020 0x01 0x0
			0x0024 0xde 0x0
			0x0028 0x07 0x0
			0x0030 0x4c 0x0
			0x0034 0x06 0x0
			0x029c 0x12 0x0
			0x0284 0x35 0x0
			0x0288 0x82 0x0
			0x023c 0x11 0x0
			0x051c 0x03 0x0
			0x0518 0x1c 0x0
			0x0524 0x1e 0x0
			0x04e8 0x00 0x0
			0x04ec 0x0e 0x0
			0x04f0 0x4a 0x0
			0x04f4 0x0f 0x0
			0x05b4 0x04 0x0
			0x0434 0x7f 0x0
			0x0444 0x70 0x0
			0x0510 0x17 0x0
			0x04d4 0x04 0x0
			0x04d8 0x07 0x0
			0x0598 0xd4 0x0
			0x059c 0x54 0x0
			0x05a0 0xdb 0x0
			0x05a4 0x3b 0x0
			0x05a8 0x31 0x0
			0x0584 0x24 0x0
			0x0588 0xe4 0x0
			0x058c 0xec 0x0
			0x0590 0x3b 0x0
			0x0594 0x36 0x0
			0x0570 0xff 0x0
			0x0574 0xff 0x0
			0x0578 0xff 0x0
			0x057c 0x7f 0x0
			0x0580 0x66 0x0
			0x04fc 0x00 0x0
			0x04f8 0xc0 0x0
			0x0460 0x30 0x0
			0x0464 0x00 0x0
			0x05bc 0x0c 0x0
			0x04dc 0x0d 0x0
			0x0408 0x0c 0x0
			0x0414 0x03 0x0
			0x09a4 0x01 0x0
			0x0c90 0x00 0x0
			0x0c40 0x01 0x0
			0x0c48 0x01 0x0
			0x0c50 0x00 0x0
			0x0cb4 0x33 0x0
			0x0cbc 0x00 0x0
			0x0ce0 0x58 0x0
			0x0ca4 0x0f 0x0
			0x0048 0x90 0x0
			0x0c1c 0xc1 0x0
			0x0988 0x88 0x0
			0x0998 0x0b 0x0
			0x08dc 0x0d 0x0
			0x09ec 0x12 0x0
			0x0800 0x00 0x0
			0x0844 0x03 0x0>;
};

&pcie1 {
	qcom,pcie-phy-ver = <2111>;

	qcom,phy-sequence = <0x0a40 0x03 0x0
			0x0010 0x00 0x0
			0x001c 0x31 0x0
			0x0020 0x01 0x0
			0x0024 0xde 0x0
			0x0028 0x07 0x0
			0x0030 0x4c 0x0
			0x0034 0x06 0x0
			0x0048 0x90 0x0
			0x0058 0x0f 0x0
			0x0074 0x06 0x0
			0x0078 0x06 0x0
			0x007c 0x16 0x0
			0x0080 0x16 0x0
			0x0084 0x36 0x0
			0x0088 0x36 0x0
			0x0094 0x08 0x0
			0x00a4 0x42 0x0
			0x00ac 0x0a 0x0
			0x00b0 0x1a 0x0
			0x00b4 0x14 0x0
			0x00b8 0x34 0x0
			0x00bc 0x82 0x0
			0x00c4 0x68 0x0
			0x00cc 0x55 0x0
			0x00d0 0x55 0x0
			0x00d4 0x03 0x0
			0x00d8 0xab 0x0
			0x00dc 0xaa 0x0
			0x00e0 0x02 0x0
			0x010c 0x02 0x0
			0x0110 0x24 0x0
			0x0118 0xb4 0x0
			0x011c 0x03 0x0
			0x0154 0x34 0x0
			0x0158 0x01 0x0
			0x016c 0x08 0x0
			0x01ac 0xb9 0x0
			0x01b0 0x1e 0x0
			0x01b4 0x94 0x0
			0x01b8 0x18 0x0
			0x01bc 0x11 0x0
			0x023c 0x11 0x0
			0x0284 0x35 0x0
			0x0288 0x82 0x0
			0x029c 0x12 0x0
			0x0304 0x02 0x0
			0x0408 0x0c 0x0
			0x0414 0x03 0x0
			0x0434 0x7f 0x0
			0x0444 0x70 0x0
			0x0460 0x30 0x0
			0x0464 0x00 0x0
			0x04d4 0x04 0x0
			0x04d8 0x07 0x0
			0x04dc 0x0d 0x0
			0x04e8 0x00 0x0
			0x04ec 0x0e 0x0
			0x04f0 0x4a 0x0
			0x04f4 0x0f 0x0
			0x04f8 0xc0 0x0
			0x04fc 0x00 0x0
			0x0510 0x17 0x0
			0x0518 0x1c 0x0
			0x051c 0x03 0x0
			0x0524 0x1e 0x0
			0x0570 0xff 0x0
			0x0574 0xff 0x0
			0x0578 0xff 0x0
			0x057c 0x7f 0x0
			0x0580 0x66 0x0
			0x0584 0x24 0x0
			0x0588 0xe4 0x0
			0x058c 0xec 0x0
			0x0590 0x3b 0x0
			0x0594 0x36 0x0
			0x0598 0xd4 0x0
			0x059c 0x54 0x0
			0x05a0 0xdb 0x0
			0x05a4 0x3b 0x0
			0x05a8 0x31 0x0
			0x05bc 0x0c 0x0
			0x063c 0x11 0x0
			0x0684 0x35 0x0
			0x0688 0x82 0x0
			0x069c 0x12 0x0
			0x0704 0x20 0x0
			0x0808 0x0c 0x0
			0x0814 0x03 0x0
			0x0834 0x7f 0x0
			0x0844 0x70 0x0
			0x0860 0x30 0x0
			0x0864 0x00 0x0
			0x08d4 0x04 0x0
			0x08d8 0x07 0x0
			0x08dc 0x0d 0x0
			0x08e8 0x00 0x0
			0x08ec 0x0e 0x0
			0x08f0 0x4a 0x0
			0x08f4 0x0f 0x0
			0x08f8 0xc0 0x0
			0x08fc 0x00 0x0
			0x0910 0x17 0x0
			0x0918 0x1c 0x0
			0x091c 0x03 0x0
			0x0924 0x1e 0x0
			0x0970 0xff 0x0
			0x0974 0xff 0x0
			0x0978 0xff 0x0
			0x097c 0x7f 0x0
			0x0980 0x66 0x0
			0x0984 0x24 0x0
			0x0988 0xe4 0x0
			0x098c 0xec 0x0
			0x0990 0x3b 0x0
			0x0994 0x36 0x0
			0x0998 0xd4 0x0
			0x099c 0x54 0x0
			0x09a0 0xdb 0x0
			0x09a4 0x3b 0x0
			0x09a8 0x31 0x0
			0x09bc 0x0c 0x0
			0x0adc 0x05 0x0
			0x0b88 0x88 0x0
			0x0b98 0x0b 0x0
			0x0ba4 0x01 0x0
			0x0bec 0x12 0x0
			0x0e0c 0x0d 0x0
			0x0e14 0x07 0x0
			0x0e1c 0xc1 0x0
			0x0e40 0x01 0x0
			0x0e48 0x01 0x0
			0x0e90 0x00 0x0
			0x0eb4 0x33 0x0
			0x0ebc 0x00 0x0
			0x0ee0 0x58 0x0
			0x0ea4 0x0f 0x0
			0x0a00 0x00 0x0
			0x0a44 0x03 0x0>;
};

&clock_scc {
	compatible = "qcom,scc-sa8155-v2";
};

&clock_gcc {
	compatible = "qcom,gcc-sa8155-v2", "syscon";
};

&clock_videocc {
	compatible = "qcom,videocc-sa8155-v2", "syscon";
};

&clock_npucc {
	compatible = "qcom,npucc-sa8155-v2", "syscon";
};

&clock_camcc {
	compatible = "qcom,camcc-sa8155-v2", "syscon";
};