/*
 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.

 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include "skeleton64.dtsi"
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,scc-sm6150.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "quin-vm-common.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. SA6155P Virtual Machine";
	qcom,msm-name = "SA6155P";
	qcom,msm-id = <377 0x0>;

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		CPU0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x0>;
			capacity-dmips-mhz = <1024>;
		};

		CPU1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x1>;
			capacity-dmips-mhz = <1024>;
		};

		CPU2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x2>;
			capacity-dmips-mhz = <347>;
		};

		CPU3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x3>;
			capacity-dmips-mhz = <347>;
		};

		CPU4: cpu@4 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x4>;
			capacity-dmips-mhz = <347>;
		};

		CPU5: cpu@5 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x5>;
			capacity-dmips-mhz = <347>;
		};

		CPU6: cpu@6 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x6>;
			capacity-dmips-mhz = <347>;
		};

		CPU7: cpu@7 {
			device_type = "cpu";
			compatible = "arm,armv8";
			reg = <0x0 0x7>;
			capacity-dmips-mhz = <347>;
		};

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&CPU0>;
				};

				core1 {
					cpu = <&CPU1>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&CPU2>;
				};

				core1 {
					cpu = <&CPU3>;
				};

				core2 {
					cpu = <&CPU4>;
				};

				core3 {
					cpu = <&CPU5>;
				};

				core4 {
					cpu = <&CPU6>;
				};

				core5 {
					cpu = <&CPU7>;
				};
			};
		};
	};


	aliases {
		pci-domain0 = &pcie0; /* PCIe0 domain */
	};

	aliases {
		sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
	};

};

&soc {
	hsi2s: qcom,hsi2s {
		compatible = "qcom,sa6155-hsi2s", "qcom,hsi2s";
		number-of-interfaces = <2>;
		reg = <0x1B40000 0x28000>;
		reg-names = "lpa_if";
		interrupts = <GIC_SPI 267 0>;
		clocks = <&clock_virt GCC_SDR_CORE_CLK>,
			 <&clock_virt GCC_SDR_WR0_MEM_CLK>,
			 <&clock_virt GCC_SDR_WR1_MEM_CLK>,
			 <&clock_virt GCC_SDR_WR2_MEM_CLK>,
			 <&clock_virt GCC_SDR_CSR_HCLK>;
		clock-names = "core_clk", "wr0_mem_clk",
			      "wr1_mem_clk", "wr2_mem_clk",
			      "csr_hclk";
		number-of-rate-detectors = <2>;
		rate-detector-interfaces = <0 1>;
		iommus = <&apps_smmu 0x035C 0x1>;
		qcom,smmu-s1-bypass;
		qcom,iova-mapping = <0x0 0xFFFFFFFF>;

		sdr0: qcom,hs0_i2s {
			compatible = "qcom,hsi2s-interface";
			minor-number = <0>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <&hs0_i2s_sck_active &hs0_i2s_data0_active
				     &hs0_i2s_data1_active>;
			pinctrl-1 = <&hs0_i2s_sck_sleep &hs0_i2s_data0_sleep
				     &hs0_i2s_data1_sleep>;
			clocks = <&clock_virt GCC_SDR_PRI_MI2S_CLK>;
			clock-names = "pri_mi2s_clk";
			bit-clock-hz = <12288000>;
			data-buffer-ms = <10>;
			bit-depth = <32>;
			spkr-channel-count = <2>;
			mic-channel-count = <2>;
			pcm-rate = <2>;
			pcm-sync-src = <0>;
			aux-mode = <0>;
			rpcm-width = <1>;
			tpcm-width = <1>;
			enable-tdm = <1>;
			tdm-rate = <32>;
			tdm-rpcm-width = <16>;
			tdm-tpcm-width = <16>;
			tdm-sync-delay = <2>;
			tdm-inv-sync = <0>;
			pcm-lane-config = <1>;
		};

		sdr1: qcom,hs1_i2s {
			compatible = "qcom,hsi2s-interface";
			minor-number = <1>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <&hs1_i2s_sck_active &hs1_i2s_data0_active
				     &hs1_i2s_data1_active>;
			pinctrl-1 = <&hs1_i2s_sck_sleep &hs1_i2s_data0_sleep
				     &hs1_i2s_data1_sleep>;
			clocks = <&clock_virt GCC_SDR_SEC_MI2S_CLK>;
			clock-names = "sec_mi2s_clk";
			bit-clock-hz = <12288000>;
			data-buffer-ms = <10>;
			bit-depth = <32>;
			spkr-channel-count = <2>;
			mic-channel-count = <2>;
			pcm-rate = <2>;
			pcm-sync-src = <0>;
			aux-mode = <0>;
			rpcm-width = <1>;
			tpcm-width = <1>;
			enable-tdm = <1>;
			tdm-rate = <32>;
			tdm-rpcm-width = <16>;
			tdm-tpcm-width = <16>;
			tdm-sync-delay = <2>;
			tdm-inv-sync = <0>;
			pcm-lane-config = <1>;
		};
	};

	clock_virt: qcom,virtio-gcc {
		compatible = "virtio,mmio";
		reg = <0x1c200000 0x1000>;
		interrupts = <0 48 0>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	clock_virt_scc: qcom,virtio-scc {
		compatible = "virtio,mmio";
		reg = <0x1c300000 0x1000>;
		interrupts = <0 49 0>;
		#clock-cells = <1>;
	};

	regulator_virt: virtio_regulator@1c700000 {
		compatible = "virtio,mmio";
		reg = <0x1c700000 0x1000>;
		interrupts = <0 42 0>;

		usb30_prim_gdsc: usb30_prim_gdsc {
			regulator-name = "usb30_prim_gdsc";
		};

		usb20_sec_gdsc: usb20_sec_gdsc {
			regulator-name = "usb20_sec_gdsc";
		};

		pcie_0_gdsc: pcie_0_gdsc {
			regulator-name = "pcie_0_gdsc";
		};

		L2A: pm6155_1_l2: regulator-pm6155-1-l2 {
			regulator-name = "ldoa2";
			regulator-min-microvolt = <1650000>;
			regulator-max-microvolt = <3100000>;
		};

		L5A: pm6155_1_l5: regulator-pm6155-1-l5 {
			regulator-name = "ldoa5";
			regulator-min-microvolt = <875000>;
			regulator-max-microvolt = <975000>;
		};

		L10A: pm6155_1_l10: regulator-pm6155-1-l10 {
			regulator-name = "ldoa10";
			regulator-min-microvolt = <2950000>;
			regulator-max-microvolt = <3312000>;
		};

		L12A: pm6155_1_l12: regulator-pm6155-1-l12 {
			regulator-name = "ldoa12";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1890000>;
		};

		L13A: pm6155_1_l13: regulator-pm6155-1-l13 {
			regulator-name = "ldoa13";
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3230000>;
		};

		S6A: pm6155_1_s6: regulator-pm6155-1-s6 {
			regulator-name = "smpa6";
			regulator-min-microvolt = <947000>;
			regulator-max-microvolt = <1404000>;
		};

		S5A: pm6155_1_s5: regulator-pm6155-1-s5 {
			regulator-name = "smpa5";
			regulator-min-microvolt = <1896000>;
			regulator-max-microvolt = <2040000>;
		};

		L15A: pm6155_1_l15: regulator-pm6155-1-l15 {
			regulator-name = "ldoa15";
			regulator-min-microvolt = <1904000>;
			regulator-max-microvolt = <1904000>;
		};
	};

	pdc: interrupt-controller@0xb220000{
		compatible = "qcom,pdc-virt";
		reg = <0xb220000 0x400>;
		#interrupt-cells = <3>;
		interrupt-controller;
		qcom,pdc-pins = <8 520>, <9 521>, <10 522>, <11 523>;
	};

	apps_smmu: apps-smmu@0x15000000 {
		compatible = "qcom,qsmmu-v500";
		reg = <0x15000000 0x80000>,
			<0x150c2000 0x20>;
		reg-names = "base", "tcu-base";
		#iommu-cells = <2>;
		qcom,skip-init;
		qcom,use-3-lvl-tables;
		qcom,disable-atos;
		#global-interrupts = <1>;
		#size-cells = <1>;
		#address-cells = <1>;
		ranges;
		interrupts =	<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	qcom,sps {
			compatible = "qcom,msm-sps-4k";
			qcom,pipe-attr-ee;
			status = "ok";
	};

	qcom_seecom: qseecom@86d00000 {
			compatible = "qcom,qseecom";
			reg = <0x86d00000 0xe00000>;
			reg-names = "secapp-region";
			memory-region = <&qseecom_mem>;
			qcom,hlos-num-ce-hw-instances = <1>;
			qcom,hlos-ce-hw-instance = <0>;
			qcom,qsee-ce-hw-instance = <0>;
			qcom,disk-encrypt-pipe-pair = <2>;
			qcom,no-clock-support;
			qcom,qsee-reentrancy-support = <2>;
	};

	VDD_CX_LEVEL: VDD_MX_LEVEL: S2A_LEVEL:
			pm6155_1_s2_level: regulator-pm6155-1-s2-level {
			compatible = "qcom,stub-regulator";
			regulator-name = "pm6155_1_s2_level";
			regulator-min-microvolt
				= <RPMH_REGULATOR_LEVEL_RETENTION>;
			regulator-max-microvolt
				= <RPMH_REGULATOR_LEVEL_MAX>;
	};

	/* PWR_CTR1_VDD_1P8 supply */
	vreg_conn_1p8: vreg_conn_1p8 {
		compatible = "regulator-fixed";
		regulator-name = "vreg_conn_1p8";
		startup-delay-us = <4000>;
		enable-active-high;
		gpio = <&pm6155_1_gpios 1 0>;
	};

	/* PWR_CTR2_VDD_PA supply */
	vreg_conn_pa: vreg_conn_pa {
		compatible = "regulator-fixed";
		regulator-name = "vreg_conn_pa";
		startup-delay-us = <4000>;
		enable-active-high;
		gpio = <&pm6155_1_gpios 6 0>;
	};

	vreg_wlan: vreg_wlan {
		compatible = "qcom,stub-regulator";
		regulator-name = "vreg_wlan";
	};

	cnss_pcie: qcom,cnss-qca-converged {
		compatible = "qcom,cnss-qca-converged";

		qcom,converged-dt;
		qcom,wlan-rc-num = <0>;
		qcom,bus-type=<0>;
		qcom,notify-modem-status;
		qcom,msm-bus,name = "msm-cnss";
		qcom,msm-bus,num-cases = <4>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
			<45 512 0 0>, <1 512 0 0>,
			/* Upto 200 Mbps */
			<45 512 41421 655360>, <1 512 41421 655360>,
			/* Upto 400 Mbps */
			<45 512 98572 655360>, <1 512 98572 1600000>,
			/* Upto 800 Mbps */
			<45 512 207108 1146880>, <1 512 207108 3124992>;

		#address-cells=<1>;
		#size-cells=<1>;
		ranges = <0x10000000 0x10000000 0x10000000>,
		      <0x20000000 0x20000000 0x10000>,
		      <0xa0000000 0xa0000000 0x10000000>,
		      <0xb0000000 0xb0000000 0x10000>;

		vdd-wlan-ctrl1-supply = <&vreg_conn_pa>;
		vdd-wlan-ctrl2-supply = <&vreg_conn_1p8>;
		vdd-wlan-supply = <&vreg_wlan>;
		vdd-wlan-rfa1-supply = <&pm6155_1_s6>;
		vdd-wlan-rfa2-supply = <&pm6155_1_s5>;
		vdd-wlan-rfa3-supply = <&pm6155_1_l15>;

		wlan_vregs = "vdd-wlan-ctrl1", "vdd-wlan-ctrl2";
		qcom,vdd-wlan-ctrl1-info = <0 0 0 0>;
		qcom,vdd-wlan-ctrl2-info = <0 0 0 0>;

		wlan-en-gpio = <&tlmm 98 0>;
		pinctrl-names = "wlan_en_active", "wlan_en_sleep";
		pinctrl-0 = <&cnss_wlan_en_active>;
		pinctrl-1 = <&cnss_wlan_en_sleep>;

		chip_cfg@0 {
			reg = <0x10000000 0x10000000>,
			    <0x20000000 0x10000>;
			reg-names = "smmu_iova_base", "smmu_iova_ipa";

			supported-ids = <0x003e>;
			wlan_vregs = "vdd-wlan";
			qcom,vdd-wlan-info = <0 0 0 10>;

			qcom,smmu-s1-enable;
			qcom,wlan-ramdump-dynamic = <0x200000>;
		};

		chip_cfg@1 {
			reg = <0xa0000000 0x10000000>,
			    <0xb0000000 0x10000>;
			reg-names = "smmu_iova_base", "smmu_iova_ipa";

			supported-ids = <0x1101>;
			wlan_vregs = "vdd-wlan-rfa1", "vdd-wlan-rfa2",
				   "vdd-wlan-rfa3";
			qcom,vdd-wlan-rfa1-info = <1350000 1350000 0 0>;
			qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
			qcom,vdd-wlan-rfa3-info = <1904000 1904000 0 0>;

			qcom,wlan-ramdump-dynamic = <0x400000>;
			mhi,max-channels = <30>;
			mhi,timeout = <10000>;

			mhi_channels {
				mhi_chan@0 {
					reg = <0>;
					label = "LOOPBACK";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@1 {
					reg = <1>;
					label = "LOOPBACK";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@4 {
					reg = <4>;
					label = "DIAG";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@5 {
					reg = <5>;
					label = "DIAG";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@20 {
					reg = <20>;
					label = "IPCR";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <1>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
					mhi,auto-start;
				};

				mhi_chan@21 {
					reg = <21>;
					label = "IPCR";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
					mhi,auto-queue;
					mhi,auto-start;
				};
			};

			mhi_events {
				mhi_event@0 {
					mhi,num-elements = <32>;
					mhi,intmod = <1>;
					mhi,msi = <1>;
					mhi,priority = <1>;
					mhi,brstmode = <2>;
					mhi,data-type = <1>;
				};

				mhi_event@1 {
					mhi,num-elements = <256>;
					mhi,intmod = <1>;
					mhi,msi = <2>;
					mhi,priority = <1>;
					mhi,brstmode = <2>;
				};
			};
		};

		chip_cfg@2 {
			reg = <0xa0000000 0x10000000>,
			    <0xb0000000 0x10000>;
			reg-names = "smmu_iova_base", "smmu_iova_ipa";

			supported-ids = <0x1102>;
			wlan_vregs = "vdd-wlan-rfa1", "vdd-wlan-rfa2",
				   "vdd-wlan-rfa3";
			qcom,vdd-wlan-rfa1-info = <1350000 1350000 0 0>;
			qcom,vdd-wlan-rfa2-info = <2040000 2040000 0 0>;
			qcom,vdd-wlan-rfa3-info = <1904000 1904000 0 0>;

			qcom,wlan-ramdump-dynamic = <0x300000>;
			mhi,max-channels = <30>;
			mhi,timeout = <10000>;
			mhi,ee = <0x3>, <0x4>;
			mhi,ee-names = "SBL", "RDDM";
			mhi,bhie-offset = <0x0324>;

			mhi_channels {
				#address-cells = <1>;
				#size-cells = <0>;
				mhi_chan@0 {
					reg = <0>;
					label = "LOOPBACK";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@1 {
					reg = <1>;
					label = "LOOPBACK";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@4 {
					reg = <4>;
					label = "DIAG";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@5 {
					reg = <5>;
					label = "DIAG";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
				};

				mhi_chan@16 {
					reg = <16>;
					label = "IPCR";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <1>;
					mhi,data-type = <1>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
					mhi,auto-start;
				};

				mhi_chan@17 {
					reg = <17>;
					label = "IPCR";
					mhi,num-elements = <32>;
					mhi,event-ring = <1>;
					mhi,chan-dir = <2>;
					mhi,data-type = <0>;
					mhi,doorbell-mode = <2>;
					mhi,ee = <0x14>;
					mhi,auto-queue;
					mhi,auto-start;
				};
			};

			mhi_events {
				mhi_event@0 {
					mhi,num-elements = <32>;
					mhi,intmod = <1>;
					mhi,msi = <1>;
					mhi,priority = <1>;
					mhi,brstmode = <2>;
					mhi,data-type = <1>;
				};

				mhi_event@1 {
					mhi,num-elements = <256>;
					mhi,intmod = <1>;
					mhi,msi = <2>;
					mhi,priority = <1>;
					mhi,brstmode = <2>;
				};
			};
		};
	};

	sdhc_2: sdhci@8804000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x8804000 0x1000>;
		reg-names = "hc_mem";
		interrupts = <0 204 0>, <0 222 0>;
		interrupt-names = "hc_irq", "pwr_irq";
		qcom,bus-width = <4>;
		qcom,large-address-bus;
		qcom,clk-rates = <400000 20000000 25000000
				50000000 100000000 202000000>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
				      "SDR104";
		qcom,devfreq,freq-table = <50000000 202000000>;
		qcom,msm-bus,name = "sdhc2";
		qcom,msm-bus,num-cases = <8>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
			/* No vote */
			<81 512 0 0>, <1 608 0 0>,
			/* 400 KB/s*/
			<81 512 1046 1600>,
			<1 608 1600 1600>,
			/* 20 MB/s */
			<81 512 52286 80000>,
			<1 608 80000 80000>,
			/* 25 MB/s */
			<81 512 65360 100000>,
			<1 608 100000 100000>,
			/* 50 MB/s */
			<81 512 130718 200000>,
			<1 608 133320 133320>,
			/* 100 MB/s */
			<81 512 261438 200000>,
			<1 608 150000 150000>,
			/* 200 MB/s */
			<81 512 261438 400000>,
			<1 608 300000 300000>,
			/* Max. bandwidth */
			<81 512 1338562 4096000>,
			<1 608 1338562 4096000>;
		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
			100750000 200000000 4294967295>;
		/* PM QoS */
		qcom,pm-qos-irq-type = "affine_irq";
		qcom,pm-qos-irq-latency = <67 67>;
		qcom,pm-qos-cpu-groups = <0x3f 0xc0>;
		qcom,pm-qos-legacy-latency-us = <67 67>, <67 67>;
		clocks = <&clock_virt GCC_SDCC2_AHB_CLK>,
			<&clock_virt GCC_SDCC2_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";
		/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
		qcom,dll-hsr-list = <0x0007642C 0x0 0x0 0x00010800 0x80040868>;

		vdd-supply = <&pm6155_1_l10>;
		qcom,vdd-voltage-level = <2950000 2950000>;
		qcom,vdd-current-level = <0 800000>;
		vdd-io-supply = <&pm6155_1_l2>;
		qcom,vdd-io-voltage-level = <1800000 3100000>;
		qcom,vdd-io-current-level = <0 22000>;
		pinctrl-names = "active", "sleep";
		pinctrl-0 = <&sdc2_clk_on
			&sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
		pinctrl-1 = <&sdc2_clk_off
			&sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
		cd-gpios = <&tlmm 99 1>;

		status = "disabled";
	};

	bluetooth_ext: bt_qca6174 {
		compatible = "qca,qca6174";
		pinctrl-names = "default";
		pinctrl-0 = <&bt_en_active>;
		qca,bt-reset-gpio = <&tlmm 85 0>; /* BT_EN */

		/* PWR_CTR1_VDD_PA */
		qca,bt-vdd-pa-supply = <&vreg_conn_pa>;
		/* PWR_CTR2_VDD_1P8 */
		qca,bt-chip-pwd-supply = <&vreg_conn_1p8>;

		qca,bt-vdd-vm-supply = <&pm6155_1_s6>;
		qca,bt-vdd-5a-supply = <&pm6155_1_s5>;
		qca,bt-vdd-vh-supply = <&pm6155_1_l15>;

		qca,bt-vdd-vm-voltage-level = <1370000 1370000>;
		qca,bt-vdd-5a-voltage-level = <2040000 2040000>;
		qca,bt-vdd-vh-voltage-level = <1904000 1904000>;

		qca,bt-vdd-vm-current-level = <0>;
		qca,bt-vdd-5a-current-level = <0>;
		qca,bt-vdd-vh-current-level = <450000>;

		status = "ok";
	};

	subsys_notif_virt: qcom,subsys_notif_virt@2D000000 {
		compatible = "qcom,subsys-notif-virt";
		reg = <0x2D000000 0x400>;
		reg-names = "vdev_base";
		adsp {
			subsys-name = "adsp";
			interrupts = <0 43 0>;
			interrupt-names = "state-irq";
			type = "virtual";
			offset = <0>;
		};
		wlan {
			subsys-name = "wlan";
			type = "native";
			offset = <512>;
		};
	};

	qcom_rng: qrng@793000 {
		compatible = "qcom,msm-rng";
		reg = <0x793000 0x1000>;
		qcom,msm-rng-iface-clk;
		qcom,no-qrng-config;
		qcom,msm-bus,name = "msm-rng-noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<1 618 0 0>,    /* No vote */
			<1 618 0 300000>;  /* 75 MHz */
		clocks = <&clock_virt GCC_PRNG_AHB_CLK>;
		clock-names = "iface_clk";
	};

};

#include "sa6155p-vm-pinctrl.dtsi"
#include "sm6150-slpi-pinctrl.dtsi"
#include "sa6155p-vm-qupv3.dtsi"
#include "sa6155p-vm-usb.dtsi"
#include "sa8155-vm-audio.dtsi"
#include "sa6155p-vm-pcie.dtsi"
#include "pm6155-vm.dtsi"

&tdm_quin_rx {
	qcom,msm-cpudai-tdm-clk-internal = <0>;
	qcom,msm-cpudai-tdm-sync-src = <0>;
};

&tdm_quin_tx {
	qcom,msm-cpudai-tdm-clk-internal = <0>;
	qcom,msm-cpudai-tdm-sync-src = <0>;
};

&snd_x155 {
	qcom,model = "sa6155-adp-star-snd-card";
};

&tlmm {
	dirconn-list =  <100 216 1>,
			<99 215 1>;
};