kernel_samsung_sm7125

jenna

Author	SHA1	Message	Date
Atsushi Nemoto	de862b488e	[MIPS] TX49XX has prefetch. The TX49XX has the prefetch instruction. It supports only Pref_Load (hint 0). Actually changes in this patch except for Kconfig are not have any effects, I added these changes to prevent misuse of unsupported hints. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	19 years ago
Thiemo Seufer	10a3dabddd	Add/Fix missing bit of R4600 hit cacheop workaround. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	20 years ago
Thiemo Seufer	330cfe016b	Let r4600 PRID detection match only legacy CPUs, cleanups. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	20 years ago
Ralf Baechle	1d40cfcd34	Avoid SMP cacheflushes. This is a minor optimization of startup but will also avoid smp_call_function from doing stupid things when called from a CPU that is not yet marked online. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	20 years ago
Linus Torvalds	1da177e4c3	Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!	20 years ago