Add debounce support for ep93xx gpio interrupts.
On the EP93xx, GPIO ports A, B, and F can be used to generate
interrupts. For each port, if interrupts are enabled, it is
possible to debouce the input signal. Debouncing is implemented
by passing the input signal through a 2-bit shift register clocked
by a 128Hz clock.
This patch adds a platform specific way to enable the debouce
feature for these input ports.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the ep93xx platform init code to register the built-in i2c bus.
The EP93xx processor has two GPIO pins dedicated for an I2C bus. This
patch registers the platform supplied i2c_board_info and the necessary
platform_device information for the i2c-gpio driver to use these pins.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add Cirrus Logic EDB9307A Dev Board to arch/arm/mach-ep93xx
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
This patch adds the detection routines to recognize the different
AT91CAP9 revisions (based on the PMC subsystem version number), and
uses them to:
- activate a workaround for the external interrupts levels
(on revB CPUs)
- set the UDPHS_BYPASS bit (on revB CPUs)
- set AT91_GPBR register address to the correct offset
(0xfffffd50 on revB, 0xfffffd60 on revC)
For debugging usage, the CPU revision can be found in /proc/cpuinfo
on the 'Revision' line.
This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch)
where it has been tested for the last 6 months.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the Adeneo NeoCore 926 board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert the SAM9 and CAP9 board-specific files to make use of the
sam9_smc_configure() method to configure the memory-controller for
external peripherals.
The following boards have been modified:
cam60 : NAND
cap9adk : NAND, NOR
qil-a9260 : NAND
sam9-l9260 : NAND
sam9260ek : NAND
sam9261ek : DM9000 Ethernet, NAND
sam9263 : NAND
sam9g20ek : NAND
sam9rlek : NAND
usb-a9260 : NAND
usb-a9263 .: NAND
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In at91_add_device_nand(), do not configure the Static Memory
controller with specific timing values.
The *_devices.c files are board independent, and the SMC timing values
are specific to the NAND devices that are installed on the board.
The board-specific files are now responsible for configuring the
Static Memory controller (if the don't want to leave it up to a
bootloader).
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a structure 'sam9_smc_config' and function sam9_smc_configure() to
allow the board-specific files to specify the configuration of the
Static Memory Controller per chip-select. This allows the board file
to specify timings for NAND flash, NOR flash or other external
peripherals.
This functionality can be used for all the SAM9 and CAP9 processors.
(the AT91RM9200 has a different memory-controller)
This patch is based on similar code in the AVR32 architecture.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This seems to be missing from the arm:devel branch, though the other
RealView configurations were modified accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.19-rc3. Apart from the new symbols,
the explicitly enabled eatures are AEABI, REALVIEW_HIGH_PHYS_OFFSET and
MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.14-rc2. Apart from the new symbols,
the explicitly enabled features are AACI, MMC, AEABI,
MACH_REALVIEW_PB1176 and MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds smc911x.c device configuration to the RealView
platforms. At some point it may be changed to the new smsc911x.c driver
(once complete testing was done).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch moves the Ethernet device registration from individual
realview_*.c files to core.c.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Some of the calls weren't necessary and some others were duplicated.
This patch tidies up the platsmp.c file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
All the cases where the local timer for a CPU is accessed happen on the
corresponding current CPU, hence no need to access the per-CPU local
timer mappings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds the necessary definitions and Kconfig entries to enable
Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.
Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The MCR for flushing the whole D cache is undefined on ARMv7 CPUs.
Signed-off-by: Harry Fearnhamm <Harry.Fearnhamm@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds support for RealView/PB-A8, a platform based on
Cortex-A8 with support for PCI-E and compact flash.
Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
RealView boards like PB11MPCore have 512MB of RAM available contiguously
at 0x70000000. Half of the memory is mirrored at 0x00000000 for
backwards compatibility. This patch adds the
CONFIG_REALVIEW_HIGH_PHYS_OFFSET option option to change the physical
base address so that the full amount of RAM is available to Linux. Note
that the EB board has 256MB of RAM also mirrored at 0x70000000, the only
board without this feature being PB1176.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Update to use the asm/sections.h header rather than declaring these
symbols ourselves. Change __data_start to _data to conform with the
naming found within asm/sections.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Where devices only have one consumer, passing a consumer clock ID
has no real benefit, and it only encourages wrong implementations of
the clk API. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
lh7a40x only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
aaec2000 only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Both of these symbols should be defined by a platform, or neither
should be defined. Ensure that all platforms conform.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
RiscPC is the only platform using the default setting for NR_IRQS,
so the default NR_IRQS doesn't really make sense; remove it and
make RiscPC provide such a definition.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since 8d5796d2ec, we have allowed
PAGE_OFFSET to be configurable, so a constant virtual address
for MAX_DMA_ADDRESS is buggy. It should be defined in terms of
PAGE_OFFSET rather than a constant virtual address.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ixp23xx's mach/io.h claims to need linux/kernel.h for BUG().
However, this header doesn't make use of BUG().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/timex.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h, mach/memory.h and mach/timex.h. Include
this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hartley Sweeten