Adding vbus_pin_inverted so that the usb detect pin can be active high
or low depending on HW implementation also replaced the
gpio_get_value(udc->vbus_pin); with a call to vbus_is_present(udc); This
allows the driver to be loaded and save about 0,15W on the consumption.
Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch will check if the kzalloc for the MCI DMA struct actually
returns a valid address, and also clean up properly if it fails or the
function fails at a later stage.
This also silences a compiler warning about using the slave variable
uninitialized.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Allow the use of another DMA controller driver in atmel-mci sd/mmc driver.
This adds a generic dma_slave pointer to the mci platform structure where
we can store DMA controller information. In atmel-mci we use information
provided by this structure to initialize the driver (with new helper
functions that are architecture dependant).
This also adds at32/avr32 chip modifications to cope with this new access
method.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds
the capacity to differentiate Engineering Samples and final lots through the
inclusion of at91_cpu_fully_identify() and the related chip IDs with chip
version field preserved.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Somme common drivers will need those at91 cpu_is_xxx() definitions. As
at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch
that adds those chips to cpu.h in AVR32 architecture.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Somme common drivers will need those at91 cpu_is_xxx() definitions. As
at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch
that adds those chips to cpu.h in AVR32 architecture.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32ap_spi_setup_slaves() is exposed to allow the addition of SPI slaves
to a SPI bus that has already been registered. This is especially
useful for add-on cards, which have their own board setup function.
at32ap_spi_add_device() has been slightly re-organized, but should be
transparent to existing users.
So to add a SPI slave, after a SPI bus has already been registered:
/* Configure the list of slaves on SPI controller "id" */
at32_spi_setup_slaves(id,spi_board_info,ARRAY_SIZE(spi_board_info));
/* Register the list of slaves */
spi_register_board_info(spi_board_info,ARRAY_SIZE(spi_board_info));
Signed-off-by: Peter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: trivial whitespace fix]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
At the moment ATMEL_USART_{RTS,CTS,CLK} have the values
1, 2 and 3 respectively. Given these are used in bitmasks,
trying to turn on the CLK line will in fact turn on the
RTS and CTS lines as well.
Change the value of ATMEL_USART_CLK to 4.
Signed-off-by: Ben Nizette <bn@niasdigital.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Adds extra parameter to AT32 at32_map_usart(), so as to reserve
RTS/CTS/CLK pins.
All boards under arch/avr32/boards have been updated (trivial change), but
not all have been tested.
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will adjust the setup the DMA controller for the AC97
Controller in the at32ap700x machine code. This setup matches the new
ALSA driver for the AC97C.
The struct ac97c_platform_data has been moved into its own header file
located in the sound include path.
Tested on ATSTK1006 + ATSTK1000.
This patch will setup the AC97 controller properly for the adjusted
machine code. Both EVKLCD10x and Hammerhead board has been updated.
Tested on EVKLCD10x, and copied to Hammerhead board.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold with board code update]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will adjust the setup the DMA controller for the Audio
Bistream DAC in the at32ap700x machine code. This setup matches the new
ALSA driver for the ABDAC.
Tested on ATSTK1006 + ATSTK1000.
This patch will setup the needed platform data for the Audio Bistream
DAC used by the Favr-32 board.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold board code update]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will use gpio_is_valid() to check the vbus_pin I/O line.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch adds two defines for setting a pin mask for 18-bit LCD panels
connected to the LCD controller. One mask for primary output and one
mask for alternative output.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch corrects the 15-bit LCDC pin mask definitions to select the
five upper lines in each color byte from the LCDC data output. When
reducing the color depth the LCDC will start filling MSB and downwards.
Also only enable 5 bits per color as the define indicates.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add support for inverted rdy_busy pin for Atmel nand device controller
It will fix building error on NeoCore926 board.
Acked-by: Andrew Victor <linux@maxim.org.za>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Gregory CLEMENT <gclement@adeneo.adetelgroup.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
dma_request_channel provides an exclusive channel, so we no longer need to
pass slave data through dmaengine.
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Reviewed-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Needed to use the atmel-mci driver in an architecture
independant maner.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel. It offers versatile peripherals, such as ethernet, usb
device, usb host etc.
The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).
Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.
This patch does include the basic support for the fpga device driver,
but not the device driver itself.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_reserve_pin now takes an u32 bitmask rather than a single pin.
This allows to reserve multiple pins at once.
Remove (undocumented) SDCS (pin PE26) from reservation in board
setup code.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
(I did not compile or test it, please let me know, or help fixing
it, if something is wrong with the conversion)
This patch is part of a larger patch series which will remove
the "char bus_id[20]" name string from struct device. The device
name is managed in the kobject anyway, and without any size
limitation, and just needlessly copied into "struct device".
To set and read the device name dev_name(dev) and dev_set_name(dev)
must be used. If your code uses static kobjects, which it shouldn't
do, "const char *init_name" can be used to statically provide the
name the registered device should have. At registration time, the
init_name field is cleared, to enforce the use of dev_name(dev) to
access the device name at a later time.
We need to get rid of all occurrences of bus_id in the entire tree
to be able to enable the new interface. Please apply this patch,
and possibly convert any remaining remaining occurrences of bus_id.
We want to submit a patch to -next, which will remove bus_id from
"struct device", to find the remaining pieces to convert, and finally
switch over to the new api, which will remove the 20 bytes array
and does no longer have a size limitation.
Thanks,
Kay
From: Kay Sievers <kay.sievers@vrfy.org>
Subject: avr: struct device - replace bus_id with dev_name(), dev_set_name()
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Make USART initialization conform to Section 24.6.1 in the AT32AP7000 manual,
i.e. "To prevent the TXD line from falling when the USART is disabled, the use
of an internal pull up is mandatory."
Signed-off-by: Anders Blomdell <anders.blomdell@control.lth.se>
[haavard.skinnemoen@atmel.com: enable pullup on RX as well]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add essential system devices, including GPIO controllers, automatically
at core_initcall time. This ensures that the devices are there when the
PIO driver gets initialized at postcore_initcall, fixing a bug exposed
by commit d6634db8fe "avr32: Use
platform_driver_probe for pio platform driver".
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The loops_per_jiffy variable isn't updated when cpufreq changes the CPU
frequency. This could cause udelay() and friends to produce wrong
delays.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Bug was introduced with the new at32_select_periph function.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
As policy->governor is already set to CPUFREQ_DEFAULT_GOVERNOR in the
(always built-in) cpufreq core, we do not need to set it in the drivers.
This fixes the sparc64 allmodconfig build failure.
Also, remove a totally useles setting of ->policy in cpufreq-pxa3xx.c.
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The MIMC200 board uses the SPD output pin from the Ethernet MACs for
other purposes.
One of these is as a board-reset, so I've had to #define off the SPD
output pin declaration.
This is probably not the best way of achieving this, but works in the
current framework.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_select_periph() now takes an u32 bitmask rather than a single pin.
This allows to set multiple pins at once.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This adds support for DMA transfers through the generic DMA engine
framework with the DMA slave extensions.
The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 7.5 MiB/s on fast cards with debugging disabled.
Unfortunately, the driver has been known to lock up from time to time
with DMA enabled, so DMA support is currently optional and marked
EXPERIMENTAL. However, I didn't see any problems while testing 13
different cards (MMC, SD and SDHC of different brands and sizes), so I
suspect the "Initialize BLKR before sending data transfer command" fix
that was posted earlier fixed this as well.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.
Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.
Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This replaces the at32_clock_list array with a linked list.
Clocks can now be registered (added) to the list.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The probe function of the pdc platform driver lives in the init section
and so a pdc device that is created after the init section is discarded
probably results in an oops. Even if this cannot happen, using
platform_driver_probe is cleaner. (If this can happen and should be
supported the probe function must live in the devinit section instead.)
Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The probe function of the pio platform driver lives in the init section
and so a pio device that is created after the init section is discarded
probably results in an oops. Even if this cannot happen, using
platform_driver_probe is cleaner. (If this can happen and should be
supported the probe function must live in the devinit section instead.)
Signed-off-by: Uwe Kleine-König <ukleinek@strlen.de>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Currently, setting up the portmux is completely one-shot: Once a pin is
muxed, the portmux driver will complain loudly and refuse to do anything
if you try to set up the same pin again.
Sometimes, it may be necessary to change the configuration of a pin
after it has been set up initially. This patch adds a way to undo the
previous configuration, allowing the pin to be reconfigured.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The value stored into the SDRAMC LPR register should be the current
value of the register with the Self-refresh value set in the lower bit
field.
The bug involved only the Self-refresh value being written to the
register, thus over writing any low-power ram settings.
Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Introduce a few helper functions for HMATRIX configuration and clean up
the register definitions. Also add definitions for the HMATRIX master
and slave IDs on the AT32AP700x chips.
Also make the definitions in hmatrix.h available to board code by moving
it to <mach/hmatrix.h>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Hardcoded MMIO base addresses are used a few places throughout the
platform code. Move these into the chip-specific header file so that
adding support for new chips becomes a bit easier.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This file includes the appropriate chip-specific header with MMIO, IRQ
and GPIO definitions used by the platform code. It may also be used to
provide inline GPIO accessors for drivers that are willing to sacrifice
portability for faster bitbanging.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add arch/avr32/mach-*/include to include search path and copy all the
files from include/asm/arch there. The old files will be removed once
ARM does the same change and all common drivers are converted.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Minor cleanups for the MMC/SD support on avr32:
- Make at32_add_device_mci() properly initialize "missing"
platform data ... so boards like STK1002 won't try GPIO 0.
- Switch over to gpio_is_valid() instead of testing for only
one designated value.
- Provide STK1002 platform data for the unlikely case that
switches are set so first Ethernet controller isn't in use.
(That's the only way to get card detect and writeprotect
switch sensing on the STK1000.)
And get rid of one "unused variable" warning.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This adds a simple sysfs interface for GPIOs.
/sys/class/gpio
/export ... asks the kernel to export a GPIO to userspace
/unexport ... to return a GPIO to the kernel
/gpioN ... for each exported GPIO #N
/value ... always readable, writes fail for input GPIOs
/direction ... r/w as: in, out (default low); write high, low
/gpiochipN ... for each gpiochip; #N is its first GPIO
/base ... (r/o) same as N
/label ... (r/o) descriptive, not necessarily unique
/ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1)
GPIOs claimed by kernel code may be exported by its owner using a new
gpio_export() call, which should be most useful for driver debugging.
Such exports may optionally be done without a "direction" attribute.
Userspace may ask to take over a GPIO by writing to a sysfs control file,
helping to cope with incomplete board support or other "one-off"
requirements that don't merit full kernel support:
echo 23 > /sys/class/gpio/export
... will gpio_request(23, "sysfs") and gpio_export(23);
use /sys/class/gpio/gpio-23/direction to (re)configure it,
when that GPIO can be used as both input and output.
echo 23 > /sys/class/gpio/unexport
... will gpio_free(23), when it was exported as above
The extra D-space footprint is a few hundred bytes, except for the sysfs
resources associated with each exported GPIO. The additional I-space
footprint is about two thirds of the current size of gpiolib (!). Since
no /dev node creation is involved, no "udev" support is needed.
Related changes:
* This adds a device pointer to "struct gpio_chip". When GPIO
providers initialize that, sysfs gpio class devices become children of
that device instead of being "virtual" devices.
* The (few) gpio_chip providers which have such a device node have
been updated.
* Some gpio_chip drivers also needed to update their module "owner"
field ... for which missing kerneldoc was added.
* Some gpio_chips don't support input GPIOs. Those GPIOs are now
flagged appropriately when the chip is registered.
Based on previous patches, and discussion both on and off LKML.
A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this
merges to mainline.
[akpm@linux-foundation.org: a few maintenance build fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Cc: Greg KH <greg@kroah.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds platform data to the AC97C platform device. This will
let the board add a GPIO line which is connected to the external codecs
reset line.
The platform data, ac97c_platform_data, must also contain the DMA
controller ID, RX channel ID and TX channel ID.
Tested with Wolfson WM9712 and AP7000.
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch does a few small cleanups around the atmel mci platform code
and in the atmel-mci driver. The platform changes simply removes an
unused variable, uses the fact that by the end we always have some form
of platform data and notes that GPIO_PIN_NONE != 0. This last point
could cause the incorrect attempt to twice reserve pin PA0.
While we've got the hood up, add linux/err.h to the atmel-mci.c include
list. It needs it and generally pulls it by voodoo but I did once
stumble across a config which don't build.
This is against Linus' latest git.
Signed-off-by: Ben Nizette <bn@niasdigital.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.
This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.
This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)
Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.
The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.
The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.
Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Eirik Aanonsen