2 Commits (cd301c7ba4bbb5a0ee6ebf13eb4a304f29b13847)

Author	SHA1	Message	Date
Atsushi Nemoto	455cc256eb	[MIPS] TXx9: PCI error handling ... From: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Date: Thu, 24 Jul 2008 00:25:16 +0900 Subject: [PATCH] txx9: PCI error handling Add more control and detailed report on PCI error interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	17 years ago
Atsushi Nemoto	89d63fe179	[MIPS] TXx9: Reorganize PCI code ... Split out PCIC dependent code and SoC dependent code from board dependent code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code. Also fix some build problems on CONFIG_PCI=n. As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards and PCI66 support is available for all TX49 boards. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	17 years ago