Some ARM platforms have the ability to program the interrupt controller to
detect various interrupt edges and/or levels. For some platforms, this is
critical to setup correctly, particularly those which the setting is dependent
on the device.
Currently, ARM drivers do (eg) the following:
err = request_irq(irq, ...);
set_irq_type(irq, IRQT_RISING);
However, if the interrupt has previously been programmed to be level sensitive
(for whatever reason) then this will cause an interrupt storm.
Hence, if we combine set_irq_type() with request_irq(), we can then safely set
the type prior to unmasking the interrupt. The unfortunate problem is that in
order to support this, these flags need to be visible outside of the ARM
architecture - drivers such as smc91x need these flags and they're
cross-architecture.
Finally, the SA_TRIGGER_* flag passed to request_irq() should reflect the
property that the device would like. The IRQ controller code should do its
best to select the most appropriate supported mode.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Most of the architectures have the same asm/futex.h. This consolidates them
into asm-generic, with the arches including it from their own asm/futex.h.
In the case of UML, this reverts the old broken futex.h and goes back to using
the same one as almost everyone else.
Signed-off-by: Jeff Dike <jdike@addtoit.com>
Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Kill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used
anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX.
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Since the ARM AMBA bus is used on MIPS as well as ARM, we need
to make the bus available for other architectures to use. Move
the AMBA include files from include/asm-arm/hardware/ to
include/linux/amba/
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Andre McCurdy
Replaces generic swab32 routine with a more ARM friendly version.
Reduces kernel text size by approx 1200 bytes when compiled with
3.4.4 and approx 2400 bytes with 4.0.2
Probably some performance benefit as well.
Signed-off-by: Andre McCurdy <armccurdy@yahoo.co.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Several counters already have the need to use 64 atomic variables on 64 bit
platforms (see mm_counter_t in sched.h). We have to do ugly ifdefs to fall
back to 32 bit atomic on 32 bit platforms.
The VM statistics patch that I am working on will also make more extensive
use of atomic64.
This patch introduces a new type atomic_long_t by providing definitions in
asm-generic/atomic.h that works similar to the c "long" type. Its 32 bits
on 32 bit platforms and 64 bits on 64 bit platforms.
Also cleans up the determination of the mm_counter_t in sched.h.
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Here is the patch to implement madvise(MADV_REMOVE) - which frees up a
given range of pages & its associated backing store. Current
implementation supports only shmfs/tmpfs and other filesystems return
-ENOSYS.
"Some app allocates large tmpfs files, then when some task quits and some
client disconnect, some memory can be released. However the only way to
release tmpfs-swap is to MADV_REMOVE". - Andrea Arcangeli
Databases want to use this feature to drop a section of their bufferpool
(shared memory segments) - without writing back to disk/swap space.
This feature is also useful for supporting hot-plug memory on UML.
Concerns raised by Andrew Morton:
- "We have no plan for holepunching! If we _do_ have such a plan (or
might in the future) then what would the API look like? I think
sys_holepunch(fd, start, len), so we should start out with that."
- Using madvise is very weird, because people will ask "why do I need to
mmap my file before I can stick a hole in it?"
- None of the other madvise operations call into the filesystem in this
manner. A broad question is: is this capability an MM operation or a
filesytem operation? truncate, for example, is a filesystem operation
which sometimes has MM side-effects. madvise is an mm operation and with
this patch, it gains FS side-effects, only they're really, really
significant ones."
Comments:
- Andrea suggested the fs operation too but then it's more efficient to
have it as a mm operation with fs side effects, because they don't
immediatly know fd and physical offset of the range. It's possible to
fixup in userland and to use the fs operation but it's more expensive,
the vmas are already in the kernel and we can use them.
Short term plan & Future Direction:
- We seem to need this interface only for shmfs/tmpfs files in the short
term. We have to add hooks into the filesystem for correctness and
completeness. This is what this patch does.
- In the future, plan is to support both fs and mmap apis also. This
also involves (other) filesystem specific functions to be implemented.
- Current patch doesn't support VM_NONLINEAR - which can be addressed in
the future.
Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com>
Cc: Hugh Dickins <hugh@veritas.com>
Cc: Andrea Arcangeli <andrea@suse.de>
Cc: Michael Kerrisk <mtk-manpages@gmx.net>
Cc: Ulrich Drepper <drepper@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Patch from Jared Hulbert
The following patch changes the bus arbiter controller settings
for the Intel PXA27x Application Processor Family. Up to 5%
better video performance. It parks the bus on the core while not
in use and sets the arbitration for other bus items. The patch
only applies changes to the Intel Mainstone development platform.
This patch is not compatible with preproduction Intel PXA27x
silicon.
This patch is based on the Intel Linux Preview Kit released to the
public on 25 Feb. 2005 found at
ftp://ftp.arm.linux.org.uk/pub/linux/arm/people/xscale/mainstone/02-25-2005/.
Signed-off-by: Justin A Treon <justin_treon@yahoo.com>
Signed-off-by: Jared Hulbert <jaredeh@gmail.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Deepak Saxena
The expansion bus on the IXP46x NPU can be configured for either 32MiB or
16MiB windows and changing the configuration causes the base address for
each chip select for each region to change. Because of this, we cannot
hardcode the physical base as we currently do. This patch checks the
expansion bus configuration registers at runtime to determine the
appropriate window size. Note that this requires that the bootloader
already configured the device sizes appropriately, but I feel that is
valid assumption to make as the bootloader must configure and access
the flash window, the output display (LCD, LEDs, etc) window, and
other expansion bus devices.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Richard Purdie
This patch moves a large chunk of the sharpsl_pm driver to
arch/arm/common so that it can be reused on other devices such as the
SL-5500 (collie). It also abstracts some functions from the core into
the machine and platform specific parts of the driver to aid reuse.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
To allow multiple platforms to use the PXA27x OHCI driver, the platform
code needs to be moved into the board specific files in
arch/arm/mach-pxa. This patch does this for mainstone and adds
preliminary hooks to allow other boards to use the driver.
This has been compile tested for mainstone and successfully run on Spitz
(Sharp Zaurus SL-C3000) with the addition of an appropriate board
support file.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Patch from Lennert Buytenhek
Add symbolic names for the five ixp2400 GPIO lines on the enp2611
that are used as interrupts.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
In its interrupt handler, the (NAPI) ixp2000 netdev driver needs to use
the masked thread interrupt status register (instead of the raw one) to
prevent scheduling polling when polling is already running when a TXdone
interrupt comes in. The definitions for the masked status registers were
not in yet, so this patch adds them.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
Remove the ixdp2x01 cs89x0 hack from ixp2000's io implementation.
Since the cs89x0 driver has been made properly aware of the odd way
the cs89x0 is hooked up on the ixdp2x01, we don't need this hack
anymore.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Rod Whitby
PAGE_SHIFT is undeclared in include/asm-arm/arch-ixp4xx/memory.h, identified by the following kernel compilation error:
CC [M] sound/core/memory.o
In file included from include/asm/memory.h:27,
from include/asm/io.h:28,
from sound/core/memory.c:24:
include/asm/arch/memory.h: In function `__arch_adjust_zones':
include/asm/arch/memory.h:28: error: `PAGE_SHIFT' undeclared (first use
in this function)
This patch replaces my previous attempt at fixing this problem (Patch 3214/1) and is based on the following feedback:
Russell King wrote:
> The error you see came up on SA1100. The best solution was to move
> the __arch_adjust_zones() function out of line. I suggest ixp4xx
> does the same.
I have moved the function out of line into arch/arm/mach-ixp4xx/common-pci.c as suggested.
Signed-off-by: Rod Whitby <rod@whitby.id.au>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Rod Whitby
This patch adds support for a new arm/ixp4xx machine - the Iomega NAS 100d network attached storage product. The NAS100D is a consumer device containing a 266MHz Intel IXP420 processor, 16MB of flash, 64MB of RAM, a 160Gb internal IDE hard disk, and 802.11b/g wireless on an Atheros mini-PCI card.
Work on porting the latest 2.6.x kernel to this device is being done by
the NSLU2-Linux project (the same team who maintains the port to the
Linksys NSLU2 device). In particular, the majority of this patch was
authored by Alessandro Zummo, based on the work done for MACH_NSLU2
support by the NSLU2-Linux core team of developers.
MACH_NAS100D (as implemented by this patch) can be enabled in jumbo
ixp4xx kernels without any affect on the other machines supported by
that kernel.
This patch applies cleanly against 2.6.15-rc7 and should be trivial to
apply to later kernel versions. It does not depend upon any other
patches.
Modified files (and number of lines inserted):
arch/arm/mach-ixp4xx/Kconfig | 8
arch/arm/mach-ixp4xx/Makefile | 1
include/asm-arm/arch-ixp4xx/hardware.h | 1
include/asm-arm/arch-ixp4xx/irqs.h | 9
include/asm-arm/arch-ixp4xx/nas100d.h | 75
arch/arm/mach-ixp4xx/nas100d-pci.c | 77
arch/arm/mach-ixp4xx/nas100d-power.c | 69
arch/arm/mach-ixp4xx/nas100d-setup.c | 133
-- Rod Whitby (NSLU2-Linux project lead)
Signed-off-by: Rod Whitby <rod@whitby.id.au>
Signed-off-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Deepak Saxena
Other than interrupt masking purposes, this API is only used when
configuring interrupt lines and this patch moves that functionality
directly into the ixp4xx_set_irq_type() implementation as board level
PCI code should not need to worry about those details.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we now only build arch/arm/kernel/dma.c on machine types
which set ISA_DMA_API, we don't need to define MAX_DMA_CHANNELS
to 0 to indicate this - this definition becomes superfluous.
Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The old __address element in struct scatterlist remained from older
kernels because the ARM DMA emulation code made use of it. Move
this field into struct dma_struct, and convert DMA emulation code
to setup a SG entry as required.
Also, convert DMA emulation code to use the new DMA API rather
than the PCI DMA API.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the compiler to optimise the bus_to_virt(virt_to_bus())
transformation in the ARM ISA DMA interface.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It seems that clk_use() and clk_unuse() are additional complexity
which isn't required anymore. Remove them from the clock framework
to avoid the additional confusion which they cause, and update all
ARM machine types except for OMAP.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It seems that there's some confusion over how the clock source
framework should be used. Add some additional comments to explain
the ambiguous areas.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/entry-armv.S has contained a comment suggesting
that asm/hardware.h and asm/arch/irqs.h should be moved into the
asm/arch/entry-macro.S include. So move the includes to these
two files as required.
Add missing includes (asm/hardware.h, asm/io.h) to asm/arch/system.h
includes which use those facilities, and remove asm/io.h from
kernel/process.c.
Remove other unnecessary includes from arch/arm/kernel, arch/arm/mm
and arch/arm/mach-footbridge.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Daniel Jacobowitz
Handle new EABI relocations when loading kernel modules. This is
necessary for CONFIG_AEABI kernels, and also for some broken
(since fixed) old ABI toolchains.
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Deepak Saxena
This looks like a leftover from 2.4 days...
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Hiroki Kaminaga
This patch defines a new macro: pfn_to_kaddr(pfn).
Same macro is already defined on other arch, such as i386.
Signed-off-by: Hiroki Kaminaga <kaminaga@sm.sony.co.jp>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Deepak Saxena
Mark the ioremap'd cookie/pointer in said functions as const since
we should not be actualy touching the data. This fixes a slew of
compile warnings on IXP4xx as our reads[bwl] already mark this
parameter as const.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
sema_count() defined only for ARM but not used anywhere.
Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARMv6K CPUs have SEV (send event) and WFE (wait for event) instructions
which allow the CPU clock to be suspended until another CPU issues a
SEV, rather than spinning on the lock wasting power. Make use of these
instructions.
Note that WFE does not wait if an event has been sent since the last WFE
cleared the event status, so although it may look racy, the instruction
implementation ensures that these are dealt with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lucas Correia Villa Real
This patch adds definitions to GPIO registers for the S3C2400 into
include/asm-arm/arch-s3c2410/regs-gpio.h.
Signed-off-by: Lucas Correia Villa Real <lucasvr@gobolinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Unfortunately, we have a symbol clash between the SA-1100 header and
some drivers. Since everywhere which needs SA1100 specifics includes
asm/hardware.h, we don't need to include it in the SA1100 io.h header.
In file included from drivers/net/wireless/wavelan_cs.p.h:459,
from drivers/net/wireless/wavelan_cs.c:60:
drivers/net/wireless/wavelan_cs.h:97:1: warning: "LCSR" redefined
In file included from include/asm/arch/hardware.h:56,
from include/asm/hardware.h:16,
from include/asm/arch/io.h:13,
from include/asm/io.h:71,
from drivers/net/wireless/wavelan_cs.p.h:433,
from drivers/net/wireless/wavelan_cs.c:60:
include/asm/arch/SA-1100.h:1907:1: warning: this is the location of the previous definition
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Adam Brooks
Fixes an issue in 2.6.15-rc2 that prevented compilation of kernels for IOP3xx boards.
Signed-off-by: Adam Brooks <adam.j.brooks@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since the defintion of NODES_SHIFT may be overridden in asm/arch/memory.h
it's important to include asm/memory.h into asm/numnodes.h to ensure
that the correct value is always defined.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Kenneth Tan
To add queue manager region size which is missing from ixp4xx-regs.h
Signed-off-by: Kenneth Tan <chong.yin.tan@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The receiver status register reports latched error conditions, which
must be cleared by writing to it. However, the data register reports
unlatched conditions which are associated with the current character.
Use the data register to interpret error status rather than the RSR.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Unfortunately, later gcc versions error out when our get_user is passed
a const pointer, since we write to a temporary variable declared as
typeof(*(p)) which propagates the const-ness.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The "align" argument in ARMs __ioremap is unused and provides a
misleading expectation that it might do something. It doesn't.
Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In the old days when arm26/arm32 was combined into the same
architecture, proc-fns.h provided the xchg implementation for
arm26 CPUs. Since we no longer combine these two, this include
is no longer required. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since atomic.h does not include types.h, u32 may not be defined.
Since atomics are supposed to work on unsigned long quantities,
use unsigned long instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Unfortunately, using PAGE_SHIFT in asm/arch/memory.h is unsafe, and we
can't include asm/page.h into this file because then we have a circular
dependency. Move the offending code to arch/arm/common/sa1111.c
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
atomic.h, bitops.h and mmu_context.h are using likely/unlikely.
thread_info.h uses __attribute_const__. Hence these files require
linux/compiler.h to be included.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
If 'old' and 'oldval' are different then 'res' never gets set. In that
case, if ever %0 happened to contain anything but zero (rather likely)
then the code will loop forever (or until another CPU just come along
and change the atomic value to match 'old' which is rather unlikely).
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move __io_address to arch-realview/hardware.h, drop core.h from platsmp.c
and localtimer.c, and include asm/io.h where required.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Introduce an atomic_inc_not_zero operation. Make this a special case of
atomic_add_unless because lockless pagecache actually wants
atomic_inc_not_negativeone due to its offset refcount.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: "Paul E. McKenney" <paulmck@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Russell King