Use a completion instead of abusing a semaphore for hypervisor event
completion in viopath.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
An allmodconfig on the current powerpc tree yields:
arch/powerpc/platforms/44x/Kconfig:41:warning: 'select' used by
config symbol '440GP' refers to undefined symbol 'IBM_NEW_EMAC_ZMII'
Hide the select until the driver exists.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Remove explicit phandles and move to using references that autogenerate the
phandles when needed.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Adding memory-controller and l2-cache-controller entries to be used by EDAC
as of_devices for MPC8541 CDS, MPC8544 DS, MPC8555 CDS, and MPC8568 MDS.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Adding memory-controller and l2-cache-controller entries to be used by EDAC
as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS.
Also fixed up the size of the PCI node on MPC8560 ADS.
Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When an rheap is created, the caller can specify the alignment to use. In
rh_alloc_align(), if a free block is found that is the exact size needed
(including extra space for alignment), that configured alignment value is not
used to align the pointer. Instead, the default alignment is used. If the
default alignment is smaller than the configured alignment, then the returned
value will not be aligned correctly.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We get the following warnings in various ARCH=powerpc builds:
WARNING: "ee_restarts" [arch/powerpc/kernel/built-in] is COMMON symbol
WARNING: "fee_restarts" [arch/powerpc/kernel/built-in] is COMMON symbol
WARNING: "htab_hash_searches" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "next_slot" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "mmu_hash_lock" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "primary_pteg_full" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "global_dbcr0" [arch/powerpc/kernel/built-in] is COMMON symbol
Switch to moving local symbols (except mmu_hash_lock which is global) and
space directive instead.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx).
This prevents needlessly setting M=1 when not SMP.
Signed-off-by: James.Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This finally adds the PPC_PRPMC2800 Kconfig option, the board setup
code (the setup and reset functions) and the defconfig, to support the
Motorola PrPMC2800 platform.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The Motorola PrPMC280 and PrPMC2800 processor modules sit on an F101 or
PrPMC2800 baseboard, respectively. There are several variants of each
type of processor module which can have different amounts of memory,
amounts of FLASH, cpu frequencies, and an mv64360 or an mv64362.
The bootwrapper code for that platform reads VPD from an I2C EEPROM
to determine the processor module variant. From the variant, the
amount of memory, etc. is determined and the device tree is updated
accordingly. If the variant cannot be determined (e.g., corrupted
VPD or a previously unknown variant), the property values already
in the device tree are used.
Also, the firmware for those platforms does not completely configure
the mv64x60 host bridge so that configuration is done here.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add the device tree source file for the prpmc2800 line of processor PMCs.
Several of the property values are updated by the bootwrapper but sane
defaults have been chosen in case the bootwrapper can't determine the
exact processor board variant. The defaults should allow the kernel
to boot despite having non-optimal device tree property values.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
check_cache_coherency() verifies that the cache coherency setting of
the kernel (CONFIG_NOT_COHERENT_CACHE) matches that left by the firmware,
as indicated by coherency-off device tree property.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds PCI bridge support for the Marvell mv64x60 chip.
We also provide the ability to read/write the mv64x60 hotswap
register via sysfs if the hs_reg_valid property is set in the
device tree.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
I2C ports, based on information contained in device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
ethernet controller ports, based on information contained in the
device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch creates platform_device entries for the Marvell mv64x60
MPSC (multi-protocol serial controller) ports, based on information
contained in the device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
There are 3 interrupt groups each with its own status/mask registers.
We use a separate struct irq_chip for each interrupt group and handle
interrupts in two stages or levels: level 1 selects the appropriate
struct irq_chip, and level 2 selects individual interrupts within
that irq_chip.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Some platforms support a variety processor modules with no method of
determining which exact processor module is being used except by
examining Vital Product Data (VPD). The modules may have different
amounts of memory, clock frequencies, etc. so reading the VPD becomes
necessary to correctly set properties in the device tree before its
passed to the kernel.
Often the VPD is stored in I2C EEPROMs so an I2C driver becomes necessary.
This I2C driver is for the I2C controller that's embedded on the Marvel
mv64x60 line of host bridges.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The bootwrapper requires a serial driver to allow cmdline editing
and information reporting on the console. This driver is required
by platforms that boot a zImage and use the MPSC for the console.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The mv64x60 host bridge has many windows between its various components
(cpu, system memory, ethernet ctlr, MPSC, DMA ctlr, PCI MEM, PCI I/O).
Unfortunately, the firmware on some of mv64x60-based platforms do not
properly or completely configure those windows (e.g., MPSC->system memory
windows not configured or CPU->PCI MEM space not configured).
So, the missing configuration needs to be done in either the bootwrapper
or in the kernel. To keep the kernel as clean as possible, it is done
in the bootwrapper. Note that I/O controller configuration is NOT being
done, its only the windows to allow the I/O controllers and other components
to access memory, etc. that is being done--drivers assume that their
controllers can already access system memory).
Table of routines and the windows they configure:
mv64x60_config_ctlr_windows() ENET->System Memory
MPSC->System Memory
IDMA->System Memory
mv64x60_config_pci_windows() PCI MEM->System Memory
PCI I/O->Bridge's Registers
mv64x60_config_cpu2pci_window() CPU->PCI MEM
CPU->PCI I/O
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add 'zImage.dts' and 'zImage.dts_initrd' build rules that automatically
compile and wrap a dts file from arch/powerpc/boot/dts into the zImage file.
The resulting zImage will be arch/powerpc/boot/zImage.dts.<platform> and
arch/powerpc/boot/zImage.dts_initrd.<platform>, respectively.
Having separate rules allows the user to choose whether to include a device
tree--and which device tree--at build time. This is useful when one Makefile
target builds a zImage that runs on several platforms except for differing
device trees. By just setting CONFIG_DEVICE_TREE and running "make zImage.dts"
the exact zImage you want is built without Makefile bloat or manually running
the wrapper script.
The dts file is expected to be arch/powerpc/boot/dts/$(CONFIG_DEVICE_TREE)
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The boot wrapper platform init code on 83xx and 85xx using the cuboot
platform type was incorrectly assuming that u-boot supplied the size
of the initrd, whereas it actually supplies the end address. This
fixes it.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
An mdio bus scan was added with ucc_geth phylib
migration patches, now machines complain on boot, saying:
prom_parse: Bad cell count for /qe@e0100000/mdio@2120/ethernet-phy@00
prom_parse: Bad cell count for /qe@e0100000/mdio@2120/ethernet-phy@01
since size-cells can indeed be 0, this patch fixes the check.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Greatly simplify the function smp_space_timers.
The stolen time calculation (per comment within the code) doesn't need the
half-jiffy stagger any more. There isn't an issue with bouncing off global
locks, so we really shouldn't need any sort of staggering at all.
However, the last_jiffy value still needs to be set. This removes the
extra stagger logic, and just sets the values.
This change should benefit applications that rely on barrier
synchronization, and will help cut down OS jitter.
Boot tested across the board (G5,power3,power4,power5,970mp blade).
Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Fixes warnings:
arch/powerpc/platforms/ps3/system-bus.c: In function 'ps3_map_sg':
arch/powerpc/platforms/ps3/system-bus.c:278: warning: unused variable 'i'
arch/powerpc/platforms/ps3/system-bus.c:277: warning: unused variable 'dev'
arch/powerpc/platforms/ps3/setup.c:103: warning: 'prealloc' defined but not used
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
fixes:
arch/powerpc/platforms/pasemi/idle.c: In function 'pasemi_system_reset_exception':
arch/powerpc/platforms/pasemi/idle.c:55: warning: implicit declaration of function 'do_IRQ'
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This case will never be hit, but it should be corrected anyway.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch renames the raw hard_irq_{enable,disable} into
__hard_irq_{enable,disable} and introduces a higher level hard_irq_disable()
function that can be used by any code to enforce that IRQs are fully disabled,
not only lazy disabled.
The difference with the __ versions is that it will update some per-processor
fields so that the kernel keeps track and properly re-enables them in the next
local_irq_disable();
This prepares powerpc for my next patch that introduces hard_irq_disable()
generically.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
When auditing syscalls that send signals, log the pid and security
context for each target process. Optimize the data collection by
adding a counter for signal-related rules, and avoiding allocating an
aux struct unless we have more than one target process. For process
groups, collect pid/context data in blocks of 16. Move the
audit_signal_info() hook up in check_kill_permission() so we audit
attempts where permission is denied.
Signed-off-by: Amy Griffis <amy.griffis@hp.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Commit 2f4dfe206a moved the definition
of hard_smp_processor_id() for the UP case from include/linux/smp.h
to include/asm/smp.h. However, include/linux/smp.h only includes
include/asm/smp.h in the SMP case, so code that wants to use
hard_smp_processor_id() has to include <asm/smp.h> explicitly to
be sure of getting the definition.
Signed-off-by: Paul Mackerras <paulus@samba.org>
If CONFIG_BLK_DEV_INITRD is not defined the prop variable in
early_init_dt_scan_chosen() is unused, causing a compiler warning.
So split the initrd logic into a separate function, allowing us to
declare prop only when we need it.
Built for both cases and booted with an initrd.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This adds the necessary support to hpte_decode() to handle 1TB
segments and 16GB pages, and removes an uninitialized value
warning on avpn.
We don't have any code to generate HPTEs for 1TB segments or 16GB
pages yet, so this is mostly for completeness, and to fix the
warning.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
pci is not initialized before being used here, so this debug print is
bogus at the current location. Move it to where it makes sense.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
My patch "Cope with PCI host bridge I/O window not starting at 0"
introduced a bug in the calculation of the virtual addresses for the
I/O windows of PCI host bridges other than the first, because it
didn't account for the fact that hose->io_resource gets offset so that
it reflects the range of global I/O port numbers assigned to the
bridge. This fixes it and simplifies get_bus_io_range() in the
process.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This is a bugfix to install Fedora Core 6 by using kernel
command line 'celleb_machine_type_hack=CHRP'.
Yes, this is a one-character fix to add forgotten '='.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Checking whether bus->self is NULL is not enough to know "bus" is the
primary bus.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Celleb has multiple PCI host bridges (phbs). Previous boot logic gives
non-overlapped bus IDs between PCI host bridges so you can identify
PHB by bus ID. But newer boot logic gives same bus ID between PHBs (it
gives bus ID 0 as root bus.) So we have to set 'phb->buid' as
non-zero.
Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The MPC834x_MDS device tree's PCI non-prefetchable MMIO range was
specified incorrectly. Both the local and bus addresses start at
0x90000000.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC832x_MDS device tree's PCI non-prefetchable MMIO range was
specified incorrectly. Both the local and bus addresses start at
0x90000000.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The rheap allocation functions return a pointer, but the actual value is based
on how the heap was initialized, and so it can be anything, e.g. an offset
into a buffer. A ulong is a better representation of the value returned by
the allocation functions.
This patch changes all of the relevant rheap functions to use a unsigned long
integers instead of a pointer. In case of an error, the value returned is
a negative error code that has been cast to an unsigned long. The caller can
use the IS_ERR_VALUE() macro to check for this.
All code which calls the rheap functions is updated accordingly. Macros
IS_MURAM_ERR() and IS_DPERR(), have been deleted in favor of IS_ERR_VALUE().
Also added error checking to rh_attach_region().
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
HD interface and AC97 interface share some pins and they are enabled at
the same time, In order to use AC97 interface, we need to disable the HD
interface first.
Signed-off-by:Jason Jin<jason.jin@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Christoph Hellwig