`!' has a higher precedence than `&' so parentheses are required.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Keys: 'right arrow', 'up arrow' and 'select' were mapped
wrongly. This patch corrects them.
This patch also adds one missing key present in the board,
currently I added it as 'unknown' key, as I am not able to
find proper description for this key.
One key entry (r: 7, c: 5) is present in the keymap, which
is really not present in the board, removing it.
Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit f62349ee97 makes it possible to
have some other than first uart port as ttyS0, which breaks the workaround
serial_in_override() function which will try to address the first uart
port (for ttyS0) and not the one that was initialized.
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
CC: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 9905a43b made struct backlight_ops const. Omap was
setting check_fb dynamically, which caused the following
compile error:
drivers/video/backlight/omap1_bl.c: In function 'omapbl_probe':
drivers/video/backlight/omap1_bl.c:142: error: assignment of read-only variable 'omapbl_ops'
Turns out pdata->check_fb is not being used, so just remove
it to fix the compile.
Cc: Emese Revfy <re.emese@gmail.com>
Cc: Richard Purdie <rpurdie@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 35c9049b27 added
drivers/spi/omap_spi_100k.c.
This patch add the related clocks and pin muxing
entries to make the driver work on omap7xx platforms.
Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some chips, namely any OMAP1 chips using METHOD_MPUIO,
OMAP15xx and OMAP7xx, cannot be setup to respond to on-chip GPIO
interrupts in both rising and falling edge directions -- they can
only respond to one direction or the other, depending on how the
ICR is configured.
Additionally, current code forces rising edge detection if both
flags are specified:
if (trigger & IRQ_TYPE_EDGE_RISING)
l |= 1 << gpio;
else if (trigger & IRQ_TYPE_EDGE_FALLING)
l &= ~(1 << gpio);
else
goto bad;
This change implements a toggle function that will modify the ICR
to flip the direction of interrupt for IRQs that are requested with
both rising and falling flags. The toggle function is not called
for chips and GPIOs it does not apply to through the use of a flip_mask
that's added on a per-bank basis. The mask is only set for those
GPIOs where a toggle is necessary. Edge detection starts out the
same as above with FALLING mode first.
The toggle happens on EACH interrupt; without it, we have the
following sequence of actions on GPIO transition:
ICR GPIO Result
0x1 0 -> 1 (rising) Interrupt
0x1 1 -> 0 (falling) No interrupt
(set ICR to 0x0 manually)
0x0 0 -> 1 (rising) No interrupt
0x0 1 -> 0 (falling) Interrupt
That is, with the ICR set to 1 for a gpio, only rising edge interrupts
are caught, and with it set to 0, only falling edge interrupts are
caught. If we add in the toggle, we get this:
ICR GPIO Result
0x1 0 -> 1 (rising) Interrupt (ICR set to 0x0)
0x0 1 -> 0 (falling) Interrupt (ICR set to 0x1)
0x1 0 -> 1 ...
so, both rising and falling are caught, per the request for both
(IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING).
Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In its current form, the omap_mcbsp_request() function can return after
irq_request() failure without any cleanups, effectively locking out the port
forever with clocks left running. Fix it.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix the following warning, which appears when the register dump for a
faulting process is printed in a kernel with SMP, DEBUG_PREEMPT, and
DEBUG_USER (with user_debug=31) enabled:
BUG: using smp_processor_id() in preemptible [00000000] code: init/1
caller is __show_regs+0x18/0x234
Backtrace:
[<c0159e5c>] (dump_backtrace+0x0/0x114) from [<c01faf30>] (dump_stack+0x18/0x1c)
r6:c781a000 r5:c0157544 r4:00000001 r3:00000000
[<c01faf18>] (dump_stack+0x0/0x1c) from [<c01e5230>] (debug_smp_processor_id+0xc4/0xf8)
[<c01e516c>] (debug_smp_processor_id+0x0/0xf8) from [<c0157544>] (__show_regs+0x18/0x234)
r6:c781bfb0 r5:00000000 r4:c781bfb0 r3:00000000
[<c015752c>] (__show_regs+0x0/0x234) from [<c01577a0>] (show_regs+0x40/0x50)
[<c0157760>] (show_regs+0x0/0x50) from [<c015c968>] (__do_user_fault+0x5c/0xa4)
r4:c781c000 r3:00000000
[<c015c90c>] (__do_user_fault+0x0/0xa4) from [<c015cbe0>] (do_page_fault+0x1b4/0x1e4)
r7:00000000 r6:00010000 r5:c781bfb0 r4:c781c000
[<c015ca2c>] (do_page_fault+0x0/0x1e4) from [<c01554c8>] (do_DataAbort+0x3c/0xa0)
[<c015548c>] (do_DataAbort+0x0/0xa0) from [<c01560c4>] (ret_from_exception+0x0/0x10)
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This updates the U300 defconfig to include the DMA driver merged
in 2.6.33-rc1 and adds a codepage that's needed to mount VFAT MMC
cards as default. The rest is new config options.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make registers unsigned for kernel space. This is important for
example in the perf events where the PC is stored into a u64. We
don't want it sign extended so make the regs unsigned to prevent
casts throughout the kernel.
Signed-off-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Somehow, strange characters made their way zaurus gpio .desc
fields. Fix it.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Stanislav Brabec <utx@penguin.cz>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
There is a possibility of a loop happening in the PLL output clock
chain on the S3C64XX series. clk_mpll's parent was set to be
clk_mout_mpll, but this is fed from clk_fout_epll (which is also
clk_mpll).
clk_mpll is meant to be the output from the MPLL, and clk_mout_mpll
is a seperate clock derived from the mux of clk_mpll and clk_fin_mpll
and thus should be considered a seperate clock.
Anything using clk_mpll directly really should not be relying on this
being the clock that is eventually routed to a peripheral, so remove the
loop and ensure that the clocks accurately represent the clock chain
in the device.
The clk_mpll is not being used outside of the s3c6400-clock.c code, so
this change should not break anything else.
Do the same for the EPLL.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Adds the device_enable function to the DaVinci Keyscan platform data
to setup the PINMUX configuration.
It also removes #ifdef from the DM365 EVM board in order to load it
properly as a module.
Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
All DaVinci platforms include a DSP or co-processor for
audio/video acceleration.
While creating memory for the DSP/co-processor, system
integrator can end up creating a hole in the memory map
of the sort:
<kernel memory> <hole (memory for DSP)> <kernel memory>
This sort of configuration needs ARCH_HAS_HOLES_MEMORYMODEL
enabled. See further details see this discussion on ARM
linux mailing list:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg15262.html
The patch is boot tested on OMAP-L138, DM6446 and DM355 EVMs
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
CC: Sriramakrishnan <srk@ti.com>
CC: Khasim Syed Mohammed <khasim@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
On da850, RTC alarm is a wakeup source from deep sleep.
Mark it as a wakeup source after the rtc platform device
is registered.
Without this patch, the rtc-omap driver suspends the RTC
during the suspend sequence and hence it cannot wakeup the
SoC.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
There is nothing special to be done for interrupts
which can wakeup the device from sleep on CP-INTC,
but not having a set_wake implemented prevents use
of common drivers which expect this function to be
implemented for all wakeup interrupt sources.
This patch fixes the issue encountered when using the
omap-rtc driver on DA850. On DA850 the RTC alarm
interrupt is used to wake up the SoC from deep sleep
mode. Without this patch, the disable_irq_wake throws
an unbalanced wake disable warning while resuming
because the previous enable call fails for lack of
set_wake implementation.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The I2C adapter ID is actually depends on Board and may vary, Davinci
uses id=1, but in case of AM3517 id=3.
So modified respective davinci board files.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add a function pointer in the platform data of the DaVinci Keyscan driver
called device_enable, in order to perform board specific actions when
the device is initialized, like setup the PINMUX configuration.
Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Implement arch_reset(), reboot from shell become possible.
Signed-off-by: lijie <eltshanli@gmail.com>
Acked-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fix following bugs:
1. typo error, CLOCK_EVT_MODE_PERIODIC -> CLOCK_EVT_FEAT_PERIODIC
2. TCSR register of timer1 missed PRESCALE
3. timer1 should be enabled before register it to clock source.
Signed-off-by: lijie <eltshanli@gmail.com>
Acked-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The WM8350 core won't actually use the range yet, but it will in
future and the platform data to configure it is there now.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This makes it a bit more obvious in genirq diagnostics that they
aren't handled by the i.MX interrupt controller.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
They will be automatically powered off at startup so users will
need to enable them for use.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
otg_ulpi_create is defined in drivers/usb/otg/ulpi.c which depends on
CONFIG_USB_ULPI. So protect its usage by the same symbol. Moreover
mxc_ulpi_access_ops needs CONFIG_MXC_ULPI.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 52939c03 (ARM: MX3: fix CPU revision number detection) started
using the CPU's SREV register for revision number detection. This
makes it mandatory to have a valid SPBA0 mapping. Add this to the
global map_io code instead of adding multiple copies for each board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Tested on Qong (EVB-Lite)
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Check whether L2 is present or not in XSC3. If it's present, enable L2
immediately.
Disabling L2 after L2 is enabled that would result in unpredicatable behavior
of XSC3 processor.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Outer cache checked whether L2 is enabled or not. If L2 isn't enabled in XSC3,
it would enable L2. This operation is evil that would make system hang.
In XSC3 core document, these words are mentioned in below.
"Following reset, the L2 Unified Cache Enable bit is cleared. To enable the L2
Cache, software may set the bit to a '1' before or at the same time as enabling
the MMU. Enabling the L2 Cache after the MMU has been enabled or disabling the
L2 Cache after the L2 Cache has been enabled, may result in unpredictable
behavior of the processor."
When outer cache is initialized, the MMU is already enabled. We couldn't enable
L2 after MMU enabled.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
PXA mmc host driver supports card detect, read only and power gpio pin
setting already. Zylonite platform driver needn't implement this any more.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
ARRAY_AND_SIZE is already defined arch/arm/mach-mmp/common.h which is
already included.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Bin Yang <bin.yang@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
DM9000s on Zeus sometime fail under heavy load.
Relaxing the timings a bit seems to be of a great help.
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
This has to be selected, otherwise some peripherals don't get initialized.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Use resource_size for {request/release}_mem_region and ioremap.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
The PCIe inbound window size is supposed to be a power of two. If
the total amount of RAM installed in the system is not a power of two,
round it up such that it is.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Roel Kluin