The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register(). Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: Roland Stigge <stigge@antcom.de>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Barry Song <baohua.song@csr.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
With ARCH_HAS_DECOMP_WDOG removed from arch/arm/boot/compressed/decompress.c,
all the arch_decomp_wdog() definition at platform level is unneeded.
Remmove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.
This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html
Includes mach-omap2 fixes from Igor Grinberg.
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch removes the IRQ mask initialization which is already done some lines
above.
This was actually a bug: The init was supposed to set the bits for the
(chained) SUB IRQs. But this is already fixed by the previous patch, doing this
implicitely via irq_set_chained_handler().
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch fixes the issue of an access to a yet uninitialized data structure
at the point where irq_set_chained_handler() was called by moving the
respective calls to the end of lpc32xx_init_irq().
The call path was:
irq_set_chained_handler()
-> __irq_set_handler()
-> irq_startup()
-> irq_enable()
-> desc->irq_data.chip->irq_unmask()
at which point lpc32xx_unmask_irq() effectively read desc->irq_data.hwirq which
was only later initialized.
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch removes the call to irq_alloc_descs() which always returns an error
since the descriptors are always preallocated already.
Signed-off-by: Roland Stigge <stigge@antcom.de>
spi-pl022 got a further update to its devicetree support, completing properties
such that no platform data is necessary anymore. This patch adjusts phy3250.c
accordingly: The supplied platform data is deleted. However, OF_DEV_AUXDATA()
are still necessary due to device naming ("dev:ssp0").
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.
Cc: Roland Stigge <stigge@antcom.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In preparation to support multi-platform kernels, move all the dtb targets
out of the mach Makefile.boot and into the arch/arm/boot/dts/Makefile
which is closer to the sources.
DTBs are only built when CONFIG_OF is enabled and now use top level
CONFIG_ARCH_xxx instead of chip or board specific config options.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
This patch removes a board specific GPIO initialization (for MMC power) from
the platform initialization. On the reference boards (PHY3250 and EA3250), this
separate initialization is not necessary, now reducing board specific
initialization in the platform init of phy3250.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
The SLC and MLC NAND drivers now need their dma_filter callbacks via platform
data to make them independent of single DMA engine drivers.
(This also helps fixing build errors of the SLC and MLC drivers when building
as modules because direct access to AMBA dma filter functions isn't available
via export.)
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
irq.c uses handle_level_irq() as the unconditional default handler. This patch
uses handle_edge_irq() instead for edge type irqs.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Srinivas Bakki <srinivas.bakki@nxp.com>
LPC32xx SoC has a 128 bits unique id that can be used as a system
serial number, if none has been provided by atags or dt.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch adjusts the LPC32xx platform support to the new pl08x DMA interface,
fixing the compile error resulting from changed pl08x structures.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Remove SPI0_CS, MMC_CD and MMC_WP gpios as they moved to devicetree.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
USB and I2C initialization can be removed safely from the board specific
phy3250.c, now that initialization moved to the generalized clock.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Move most of usb clock initialization from lpc32xx_udc and ohci-nxp to
clock.c. Also adds ohci clocks and otg clocks.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch fixes a bug, (wrongfully) resetting the value of
LPC32XX_CLKPWR_MS_CTRL back to its initial contents (after careful setup). This
was discovered only with a board/bootloader combination (EA3250) where the
contents of the respective register wasn't already at the correct value on
Linux boot.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This patch makes sure certain MMC bits are cleared as they should for
initialization.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This patch moves MMC/SD controller initialization from the board specific file
phy3250.c to clock.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Move i2s1 dma init to be done when it's clock is enabled.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Move the irda configuration to serial.c where other special cases are
handled
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Remove SSP0, CLCD and DMA clocks that are already migrated to
the clock framework.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Leave chipselect and spi devices binding to the devicetree
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
The lpc32xx spi0 chipselect will be requested directly from the
pl022 driver
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Add ea3250.dtb and phy3250.dtb to the list of dtbs to be built
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
ARCH_NR_GPIOS was defined statically to include exactly all SoC specific GPIOs.
Now if additional GPIOs need to be added dynamically, e.g. via DT, none are
available. Removing the mach specific setting, leaving ARCH_NR_GPIOS to the
default of 256 (currently in include/asm-generic/gpio.h).
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This patch switches from static serial driver initialization to devicetree
configuration. This way, the Standard UARTs of the LPC32xx SoC can be enabled
individually via DT.
E.g., instead of Kconfig configuration, the phy3250.dts activates
UARTs 3 and 5.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This patch adds support for the MMC controller of the LPC32xx SoC to the
platform initialization via the pl08x primecell driver. Lacking more complete
DT support, done via DT auxdata.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
The clock.c file needs to be changed to match the automatic device name to its
clock.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
This patch adds DMA channel configuration to the LPC32xx platform file. The
configured DMA signalling is generic for LPC32xx SoC and is not board specific.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Since we now support two MTD NAND controllers (MLC and SLC) for LPC32xx via DT,
we don't initialize the SLC controller statically anymore, but do it via the
clock setup (see previous patch).
Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
This patch adds clock initialization for the MLC NAND controller of the LPC32xx
SoC and adjusts it for the SLC controller.
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch adds device tree support for gpio-lpc32xx.c.
To register the various GPIO banks as (struct) gpio_chips via the same DT
gpio-controller, we utilize the adjusted of_xlate API to manipulate the
actually used struct gpio_chip.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The platforms using i2c-pnx.c both defined a duplicated i2c.h (used nowhere
else). This patch removes those and integrates the contents into the driver
itself.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
As a precondition for device tree conversion, the platforms using i2c-pnx.c are
converted to using mem and irq resources instead of platform data.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
This patch adjusts the clocks of the LPC32xx SoC to be picked up correctly by
the respective drivers.
* AMBA dmaengine
* watchdog
* I2C
* TSC
* MMC
* Ethernet
* ADC
* USB Device
(All except the pl08xdmac AMBA dmaengine via DT generated device name)
Signed-off-by: Roland Stigge <stigge@antcom.de>
The platforms using i2c-pnx.c both defined a duplicated i2c.h (used nowhere
else). This patch removes those and integrates the contents into the driver
itself.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
As a precondition for device tree conversion, the platforms using i2c-pnx.c are
converted to using mem and irq resources instead of platform data.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
During a complex merge for v3.4, one line of the commit
c20b909be9 ("ARM: LPC32xx: Ethernet support") was
reverted wrongly ("lpc-eth.0" -> "lpc-net.0") while the other conflicts were
merged correctly. This patch re-applies the clock name "lpc-eth.0".
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds ethernet support to the LPC32xx ARM architecture. The actual
driver in drivers/net is contained in a separate patch.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This patch adds OHCI support to the LPC32xx ARM platform. Besides the trivial
addition of platform "usb-ohci" support, fixes for the USB PLL have been added
to arch/arm/mach-lpc32xx/clock.c, ported from NXP's lpclinux.com.
(This is the mach-lpc32xx specific part, the USB subsystem specific changes are
in a separate patch for the USB maintainers.)
Signed-off-by: Roland Stigge <stigge@antcom.de>
Shawn Guo