Separate out link initialization into ata_link_init() and
ata_link_init_sata_spd().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
HRST_TO_RESUME and SKIP_D2H_BSY are link attributes. Move them to
ata_link->flags. This will allow host and PMP links to have different
attributes. ata_port_info->link_flags is added and used by LLDs to
specify these flags during initialization.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make the following functions deal with ata_link instead of ata_port.
* ata_set_mode()
* ata_eh_autopsy() and related functions
* ata_eh_report() and related functions
* suspend/resume related functions
* ata_eh_recover() and related functions
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make reset methods and related functions deal with ata_link instead of
ata_port.
* ata_do_reset()
* ata_eh_reset()
* all prereset/reset/postreset methods and related functions
This patch introduces no behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make ata_eh_about_to_do() and ata_eh_done() deal with ata_link instead
of ata_port.
This patch introduces no behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make the following PHY-related functions to deal with ata_link instead
of ata_port.
* sata_print_link_status()
* sata_down_spd_limit()
* ata_set_sata_spd_limit() and friends
* sata_link_debounce/resume()
* sata_scr_valid/read/write/write_flush()
* ata_link_on/offline()
This patch introduces no behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Multiple links and different number of devices per link should be
considered to iterate over links and devices. This patch implements
and uses link and device iterators - ata_port_for_each_link() and
ata_link_for_each_dev() - and ata_link_max_devices().
This change makes a lot of functions iterate over only possible
devices instead of from dev 0 to dev ATA_MAX_DEVICES. All such
changes have been examined and nothing should be broken.
While at it, add a separating comment before device helpers to
distinguish them better from link helpers and others.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Introduce ata_link. It abstracts PHY and sits between ata_port and
ata_device. This new level of abstraction is necessary to support
SATA Port Multiplier, which basically adds a bunch of links (PHYs) to
a ATA host port. Fields related to command execution, spd_limit and
EH are per-link and thus moved to ata_link.
This patch only defines the host link. Multiple link handling will be
added later. Also, a lot of ap->link derefences are added but many of
them will be removed as each part is converted to deal directly with
ata_link instead of ata_port.
This patch introduces no behavior change.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
* corruption fix: we only want the lower 16 bits of length (0 == 64kb)
* ditto: the upper layer sets max-phys-segments to LIBATA_MAX_PRD,
so we must reset it to own hw-specific length.
* delete unused mv_fill_sg() return value
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Three main sets of changes:
1) dmi_get_system_info() return value should have been marked const,
since callers should not be changing that data.
2) const-ify DMI internals, since DMI firmware tables should,
whenever possible, be marked const to ensure we never ever write to
that data area.
3) const-ify DMI API, to enable marking tables const where possible
in low-level drivers.
And if we're really lucky, this might enable some additional
optimizations on the part of the compiler.
The bulk of the changes are #2 and #3, which are interrelated. #1 could
have been a separate patch, but it was so small compared to the others,
it was easier to roll it into this changeset.
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
The recent mv_fill_sg() rewrite, to fix a data corruption problem
related to IOMMU virtual merging, forgot to account for the
potentially-increased size of the scatter/gather table after its run.
Additionally, the DMA boundary is reduced from 0xffffffff to 0xffff
to more closely match the needs of mv_fill_sg().
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
pata_marvell, use ioread* for iomap-ped memory
read* on pci_iomapped memory is incorrect, fix it
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Fix bug in sata_mv for cases where the IOMMU layer has merged SG entries
to larger than 64KB. They need to be split up before being sent to
the driver.
Just for simplicity's sake, split up at 64K boundary instead of 64K size,
since that's what the common code does anyway.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
There's a different version of DMI table for TECRA M3 where it has
proper vendor and product name entry. Add the entry to the broken
suspend list.
Angus Turnbull reported and provided initial patch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Angus Turnbull <angus@twinhelix.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
sis_66_set_dmamode() also handles early UDMA100 (SIS630 ET) but is
missing udma timing value for UDMA100. According to sis5513, this
should be 0x8000. This caused UDMA100 device to fail on pata_sis till
it downgrades to UDMA66 while it works fine on sis5513 at UDMA100.
Reported by Adam Blech.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Adam Blech <desaster.area@addcom.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
When PCIX_IRQ_WOC is used, sil24 has an inherent race condition
between clearing IRQ pending and reading IRQ status. If IRQ pending
is cleared after reading IRQ status, there's possibility of lost IRQ.
If IRQ pending is cleared before reading IRQ status, spurious IRQs
will occur.
sata_sil24 till now cleared IRQ pending after reading IRQ status thus
losing IRQs on machines where PCIX_IRQ_WOC was used. Reverse the
order and ignore spurious IRQs if PCIX_IRQ_WOC.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
ATI/AMD SB800 shares some device IDs with SB700,
and SB800 adds two more device IDs:0x4394,0x4395.
Signed-off-by: henry su <henry.su.ati@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Code moved to ioread/iowrite but the comment didn't
Also note a posting issue
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add Toshiba S1800-814 to whitelist for both pata_ali and alim15x3,
as it is correctly detected as 40-wire connected but this cable is
short enough to still use transfer modes higher than UDMA33.
Signed-off-by: Daniel Exner <dex@dragonslave.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
dev->horkage should be cleared over device hotunplug/plug. Clear it
in ata_dev_init().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Fix "lost" interrupt problem when using dma with CD/DVD drives in some
configurations. This problem can make installing linux from media
impossible for distro's that have switched to libata-only configurations.
The simple fix is to eliminate the use of dma for reading drive status, etc,
by checking the number of bytes to transferred.
This change will only affect the behavior of atapi devices, not disks.
There is more info at http://bugzilla.redhat.com/show_bug.cgi?id=242229
This patch is for 2.6.22.1
Signed-off-by: Jeff Norden <jnorden@math.tntech.edu>
Reviewed-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
I think that I've found and fixed the problem. There is a copy/paste bug in
vt6421_set_dma_mode() function which causes wrong values to be written to
PATA_UDMA_TIMING register.
This patch fixes a copy/paste bug that breaks DMA modes on VT6421 PATA port.
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Acked-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Some notebooks need bit18 of IOCFG to be cleared for the drive bay to
work even though the bit is NOOP according to the datasheet. This
patch implement IOCFG bit18 quirk and apply it to Clevo M570U.
http://bugzilla.kernel.org/show_bug.cgi?id=8051
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: D. Angelis <dangelis@beta-cae.gr>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Some drives choke on READ_NATIVE_MAX_ADDRESS[_EXT]. Implement
ATA_HORKAGE_BROKEN_HPA and apply it to affected drives.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This patch corrects sata_promise to classify FastTrack TX4200
(DID 3515/3519) as a second-generation chip. Promise's partial-
source FT TX4200 driver confirms this classification.
Treating it as a first-generation chip causes several problems:
1. Detection failures. This is a recent regression triggered by
the hotplug-enabling changes in 2.6.23-rc1.
2. Various "failed to resume link for reset" warnings.
This patch fixes <http://bugzilla.kernel.org/show_bug.cgi?id=8936>.
Thanks to Stephen Ziemba for reporting the bug and for testing the fix.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Tested-by: Stephen Ziemba <sziemba@ecn.purdue.edu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Satellite U200 also shares the problem. Add it to the broken suspend
list. Original patch from John Schember.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: John Schember <john@nachtimwald.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Resend trying to remove 8-bit characters in the email.
This patch adds the Intel Tolapai IDE mode SATA controller DID's.
Signed-off-by: Jason Gaston <jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
On some early drives (pre ATA1) this feature is not supported. If it
fails then we know the drive geometry is the hardware geometry and the
one we tried to set anyway so just carry on.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Whoever did the PCI revision patch slipped up on the it821x, and I
didn't spot this at the time either. They moved the check for the
errata from the 0x10 revision to 0x11. Put it back
This one is important for 2.6.23 final as in some cases bad things will
occur if 0x10 revision boards don't get the fixups.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
If the initial configuration fails early, n_sectors is left at zero.
Checking against it during revalidation makes retried configuration
fail due to n_sectors mismatch. Ignore zero n_sectors during
revalidation.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
More cable funnies
Signed-off-by: Alan Cox <alan@redhat.com>
Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Previously I reported that the pata_pdc2027x PLL detection changes
in kernel 2.6.22 broke the driver on my PowerMac:
>pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up!
This is followed by a number of errors and speed reduction
steps on the affected ports.
There are two bugs in pata_pdc2027x's PLL detection code:
1. The PLL counter's start value is read before the chip is
put in "test mode". Outside of test mode the counter is
halted, and on the PowerMac the counter is zero because
the chip hasn't been initialised by its BIOS.
The fix is to move the read of the start value to after
test mode is started, but before the mdelay() in test mode.
This also improves the precision of the PLL detection.
2. The code to compute the number of PLL decrements during the
mdelay() in test mode fails to consider that the PLL counter
only is 30 bits wide. If there is a wraparound, it will compute
an incorrect and much too large value. On the PowerMac, the
start count is zero, the end count is a large 30-bit value, so
wraparound occurs and an out of bounds PLL clock is detected.
The fix is to mask the (start - end) computation to 30 bits.
While debugging this I also noticed that pdc_read_counter()
reads the two halves of the 30-bit PLL counter as 16-bit values,
and then combines them as if the halves only are 15 bits wide.
To avoid confusion, the halves should be read as 15-bit values.
This patch implements all three changes. It fixes the PLL detection
failure on my PowerMac, and doesn't cause any regressions on an x86
with an identical card.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
If revalidation fails because device has different n_sectors after
configuration the original n_sectors should be restored before failing
revalidation. Without this fix, n_sectors difference will incorrectly
and silently pass revalidation when revalidation is retried.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Acked-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Adjust libata to ignore errors after spinup
This patch is to ignore errors from the spinup attempt if the drive is
in the "standby id" state.
Signed-off-by: Ryan Power <rpower@sysreset.com>
Acked-by: Mark Lord <liml@rtr.ca>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Tejun Heo <htejun@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add TECRA M7 to broken suspend list. Reported by Marie Koreen.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Marie Koreen <kbug@koreen.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Fix several inconsistencies in these drivers WRT reporting the clocks:
- when using DPLL mode, 'pata_hpt37x' driver reported the DPLL frequency as the
PCI clock -- make it properly report both clocks and add the same ability to
the 'pata_hpt3x2n' driver;
- both drivers sometimes use "pata_hpt3*:" and sometimes "hpt3*:" in the
messages -- make them use only the former one;
- the message about failed DPLL stablizatios deserves KERN_ERR and a bang. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The DPLL tuning code always set up it for 66 MHz due to wrong UltraDMA mask
including mode 5 used to check for the necessity of 66 MHz clocking -- this
caused 66 MHz clock to be used for HPT374 chip that does not tolerate it.
While fixing this, also remove PLL mode from the TODO list -- I don't think
it's still a relevant item.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Maximum supported UDMA mode for AEC6280[R] is UDMA5 (not UDMA4)
and for AEC6880[R] it is UDMA6 (not UDMA5):
* Fix the problem by adding missing struct ata_port_info to artop_init_one().
* Use the right naming (s/626/628/).
* Bump driver version.
Fixes IDE->libata regression, problem was never present in IDE aec62xx driver.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Underneath all the HPT packaging, PCI identifiers, binary driver modules
and stuff you find that ...
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Tejun Heo