Commit Graph

12 Commits (9355bbd685bf705a7f7bd6470b92ca0562c7a661)

Author SHA1 Message Date
Ralf Baechle 641e97f318 [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. 18 years ago
Ralf Baechle dde96ca8b3 [MIPS] Use -Werror on subdirectories which build cleanly. 18 years ago
Fuxin Zhang 2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 18 years ago
Atsushi Nemoto d2af363cfb [MIPS] Kill redundant EXTRA_AFLAGS 18 years ago
Ralf Baechle 9a88cbb522 [MIPS] Unify dma-{coherent,noncoherent.ip27,ip32} 18 years ago
Chris Dearman 9318c51acd [MIPS] MIPS32/MIPS64 secondary cache management 19 years ago
Thiemo Seufer c6281edb1d [MIPS] Kill tlb-andes.c. 19 years ago
Ralf Baechle ec917c2c1a Fixup a few lose ends in explicit support for MIPS R1/R2. 20 years ago
Ralf Baechle f5cfa980e5 Use R4000 TLB routines for SB1 also. 20 years ago
Ralf Baechle 6e760c8dae Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. 20 years ago
Ralf Baechle 875d43e72b [PATCH] mips: clean up 32/64-bit configuration 20 years ago
Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 20 years ago