The Octeon MGMT Ethernet ports are present in some members of the
Octeon SOC family (cn52XX and cn56XX have them).
The mdio bus connected to the MGMT PHYs is shared with the main
octeon-ethernet driver, we force it to be loaded first by calling
octeon_mdiobus_force_mod_depencency. The platform devices for the
MGMT Ethernet ports are added in
arch/mips/cavium-octeon/octeon-platform.c, and the register
definitions for the ports live in arch/mips/include/asm/octeon/ along
with their ilk.
Although it currently is the only driver in drivers/net/octeon, the
directory was created looking forward to the day that octeon-ethernet
will move there from its current home in drivers/staging.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
David Daney