So we can now choose for the board the ecc mode (ecc soft, soft bch, no ecc
and hardware).
Set ecc mode in the boards to soft as currently in the driver.
Move platform data to a common header
include/linux/platform_data/atmel_nand.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: David Woodhouse <dwmw2@infradead.org>
The sysdev.h file should not be needed by any in-kernel code, so remove
the .h file from these random files that seem to still want to include
it.
The sysdev code will be going away soon, so this include needs to be
removed no matter what.
Cc: Jiandong Zheng <jdzheng@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "Venkatesh Pallipadi
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Both at91 and avr32 defines its own platform data structure for
the macb driver and both share common structures though at91
includes a currently unused phy_irq_pin. Create a common
macb_platform_data for macb that both at91 and avr32 can use. In
future we can use this to support other architectures that use the
same IP block with the macb driver.
v2: rename eth_platform_data to macb_platform_data and allow at91_ether
to share the platform data with macb.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Currently atmel_nand driver used by AT91 and AVR32 calls a special callback
which return nand partition table and number of partitions. However in all
boards this callback returns just static data. So drop this callback and
make atmel_nand use partition table provided statically via platform_data.
Nicolas Ferre: I am in favor for a mainline inclusion through linux-mtd tree.
Hans-Christian Egtvedt: I'm fine by sending the changes for AVR32 through linux-mtd
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Scripted conversion to new function names with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
All file_operations should get a .llseek operation so we can make
nonseekable_open the default for future file operations without a
.llseek pointer.
The three cases that we can automatically detect are no_llseek, seq_lseek
and default_llseek. For cases where we can we can automatically prove that
the file offset is always ignored, we use noop_llseek, which maintains
the current behavior of not returning an error from a seek.
New drivers should normally not use noop_llseek but instead use no_llseek
and call nonseekable_open at open time. Existing drivers can be converted
to do the same when the maintainer knows for certain that no user code
relies on calling seek on the device file.
The generated code is often incorrectly indented and right now contains
comments that clarify for each added line why a specific variant was
chosen. In the version that gets submitted upstream, the comments will
be gone and I will manually fix the indentation, because there does not
seem to be a way to do that using coccinelle.
Some amount of new code is currently sitting in linux-next that should get
the same modifications, which I will do at the end of the merge window.
Many thanks to Julia Lawall for helping me learn to write a semantic
patch that does all this.
===== begin semantic patch =====
// This adds an llseek= method to all file operations,
// as a preparation for making no_llseek the default.
//
// The rules are
// - use no_llseek explicitly if we do nonseekable_open
// - use seq_lseek for sequential files
// - use default_llseek if we know we access f_pos
// - use noop_llseek if we know we don't access f_pos,
// but we still want to allow users to call lseek
//
@ open1 exists @
identifier nested_open;
@@
nested_open(...)
{
<+...
nonseekable_open(...)
...+>
}
@ open exists@
identifier open_f;
identifier i, f;
identifier open1.nested_open;
@@
int open_f(struct inode *i, struct file *f)
{
<+...
(
nonseekable_open(...)
|
nested_open(...)
)
...+>
}
@ read disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
|
*off += E
|
func(..., off, ...)
|
E = *off
)
...+>
}
@ read_no_fpos disable optional_qualifier exists @
identifier read_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t read_f(struct file *f, char *p, size_t s, loff_t *off)
{
... when != off
}
@ write @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
expression E;
identifier func;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
<+...
(
*off = E
|
*off += E
|
func(..., off, ...)
|
E = *off
)
...+>
}
@ write_no_fpos @
identifier write_f;
identifier f, p, s, off;
type ssize_t, size_t, loff_t;
@@
ssize_t write_f(struct file *f, const char *p, size_t s, loff_t *off)
{
... when != off
}
@ fops0 @
identifier fops;
@@
struct file_operations fops = {
...
};
@ has_llseek depends on fops0 @
identifier fops0.fops;
identifier llseek_f;
@@
struct file_operations fops = {
...
.llseek = llseek_f,
...
};
@ has_read depends on fops0 @
identifier fops0.fops;
identifier read_f;
@@
struct file_operations fops = {
...
.read = read_f,
...
};
@ has_write depends on fops0 @
identifier fops0.fops;
identifier write_f;
@@
struct file_operations fops = {
...
.write = write_f,
...
};
@ has_open depends on fops0 @
identifier fops0.fops;
identifier open_f;
@@
struct file_operations fops = {
...
.open = open_f,
...
};
// use no_llseek if we call nonseekable_open
////////////////////////////////////////////
@ nonseekable1 depends on !has_llseek && has_open @
identifier fops0.fops;
identifier nso ~= "nonseekable_open";
@@
struct file_operations fops = {
... .open = nso, ...
+.llseek = no_llseek, /* nonseekable */
};
@ nonseekable2 depends on !has_llseek @
identifier fops0.fops;
identifier open.open_f;
@@
struct file_operations fops = {
... .open = open_f, ...
+.llseek = no_llseek, /* open uses nonseekable */
};
// use seq_lseek for sequential files
/////////////////////////////////////
@ seq depends on !has_llseek @
identifier fops0.fops;
identifier sr ~= "seq_read";
@@
struct file_operations fops = {
... .read = sr, ...
+.llseek = seq_lseek, /* we have seq_read */
};
// use default_llseek if there is a readdir
///////////////////////////////////////////
@ fops1 depends on !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier readdir_e;
@@
// any other fop is used that changes pos
struct file_operations fops = {
... .readdir = readdir_e, ...
+.llseek = default_llseek, /* readdir is present */
};
// use default_llseek if at least one of read/write touches f_pos
/////////////////////////////////////////////////////////////////
@ fops2 depends on !fops1 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read.read_f;
@@
// read fops use offset
struct file_operations fops = {
... .read = read_f, ...
+.llseek = default_llseek, /* read accesses f_pos */
};
@ fops3 depends on !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write.write_f;
@@
// write fops use offset
struct file_operations fops = {
... .write = write_f, ...
+ .llseek = default_llseek, /* write accesses f_pos */
};
// Use noop_llseek if neither read nor write accesses f_pos
///////////////////////////////////////////////////////////
@ fops4 depends on !fops1 && !fops2 && !fops3 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
identifier write_no_fpos.write_f;
@@
// write fops use offset
struct file_operations fops = {
...
.write = write_f,
.read = read_f,
...
+.llseek = noop_llseek, /* read and write both use no f_pos */
};
@ depends on has_write && !has_read && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier write_no_fpos.write_f;
@@
struct file_operations fops = {
... .write = write_f, ...
+.llseek = noop_llseek, /* write uses no f_pos */
};
@ depends on has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
identifier read_no_fpos.read_f;
@@
struct file_operations fops = {
... .read = read_f, ...
+.llseek = noop_llseek, /* read uses no f_pos */
};
@ depends on !has_read && !has_write && !fops1 && !fops2 && !has_llseek && !nonseekable1 && !nonseekable2 && !seq @
identifier fops0.fops;
@@
struct file_operations fops = {
...
+.llseek = noop_llseek, /* no read or write fn */
};
===== End semantic patch =====
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Julia Lawall <julia@diku.dk>
Cc: Christoph Hellwig <hch@infradead.org>
This patch adds board support for ATNGW100 mkII. This board is an upgrade of
the ATNGW100 where the difference is an additional 256 MB NAND flash device and
128 MB 32-bit SDRAM instead of the 32 MB 16-bit SDRAM on ATNGW100.
Tested on ATNGW100 mkII, duh (-:
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
For MRMT1/2 add-on card to Atmel ATNGW100.
This patch implements the SPI slave setup method created by patch:
<<avr32: function for independently setting up SPI slaves>>
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The MRMT1 patch mistakenly reverted commit
fe272b5bd1.
This new patch is intended to correct this, so that both daughtercards
should be able to assign GPIO PC25 and PE0 to the MCI driver.
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The ezLCD+101 board (to which an favr-32 is fitted) has a long,
unshielded, nasty lead between the touch panel and the ads7843 touch
controller. In order to get satisfactory response then, we need to
employ every noise-reduction trick in the driver's arsenal. After
extensive fiddling I've found some good settings:
1) We keep vref on all the time to dramatically reduce settling times
(at the cost of a tiny increase in power consumption).
2) Despite 1 the settling time is still non-zero. 500uS is plenty of
time for the signals to settle
3) Despite 1 and 2 there's still a little bit of noise around. By
setting a pen recheck delay we make the panel feel less touchy and
twitchy.
Someone with more time and patience myself might be able to tune this
numbers further but these settings are now perfectly acceptable for
normal use.
Tested on ezLCD+101 though should only improve response on other ezLCD+/
favr-32 boards too.
Signed-off-by: Ben Nizette <bn@niasdigital.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch updates the LCD init code for the MIMC200 board.
V2 fixes a .yres typo and corrects an incorrect setup value
in the call to at32_add_device_lcdc()
Without this patch, the lcd setup is wrong and won't display images
correctly (if at all !!)
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Same patch as before, modified to use bool.
This patch solves the problem with the inverted mci detect pin on Merisc
boards.
Signed-off-by: Jonas Larsson <jonas.larsson@martinsson.se>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Adds extra parameter to AT32 at32_map_usart(), so as to reserve
RTS/CTS/CLK pins.
All boards under arch/avr32/boards have been updated (trivial change), but
not all have been tested.
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch adds RTC support for the Merisc boards.
Signed-off-by: Jonas Larsson <jonas.larsson@martinsson.se>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will adjust the setup the DMA controller for the AC97
Controller in the at32ap700x machine code. This setup matches the new
ALSA driver for the AC97C.
The struct ac97c_platform_data has been moved into its own header file
located in the sound include path.
Tested on ATSTK1006 + ATSTK1000.
This patch will setup the AC97 controller properly for the adjusted
machine code. Both EVKLCD10x and Hammerhead board has been updated.
Tested on EVKLCD10x, and copied to Hammerhead board.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold with board code update]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will adjust the setup the DMA controller for the Audio
Bistream DAC in the at32ap700x machine code. This setup matches the new
ALSA driver for the ABDAC.
Tested on ATSTK1006 + ATSTK1000.
This patch will setup the needed platform data for the Audio Bistream
DAC used by the Favr-32 board.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold board code update]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Merisc is the family name for a range of AVR32-based boards.
The boards are designed to be used in a man-machine interfacing
environment, utilizing a touch-based graphical user interface. They host
a vast range of I/O peripherals as well as a large SDRAM & Flash memory
bank.
For more information see: http://www.martinsson.se/merisc
Signed-off-by: Jonas Larsson <jonas.larsson@martinsson.se>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch adjusts the timing parameters for the Kyocera LCD panels
connected on the EVKLCD10X addon boards.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The PB15 GPIO line is used to control the enable and disable signal for
the backlight regulator on EVKLCD10x boards. This patch hands the I/O
line over to the LCDC driver, which will control when to enable and
disable the backlight.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: reverted ac97c change]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch removes the special handling of MCI platform data for
EVKLCD10x boards. This is now possible since the pin mask for the LCD
controller is no longer reserving the I/O lines used for MCI card
detection and write protect.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will set the pin mask to alternative 18 bits per pixel output
for EVKLCD10x boards.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_add_device_mci() will refuse to add the mci device if the data
parameter is NULL. Fix up the favr-32 and hammerhead boards so that this
doesn't happen.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Alex Raimondi <mailinglist@miromico.ch>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Needed to use the atmel-mci driver in an architecture
independant maner.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel. It offers versatile peripherals, such as ethernet, usb
device, usb host etc.
The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).
Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.
This patch does include the basic support for the fpga device driver,
but not the device driver itself.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_reserve_pin now takes an u32 bitmask rather than a single pin.
This allows to reserve multiple pins at once.
Remove (undocumented) SDCS (pin PE26) from reservation in board
setup code.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch removes a call to the deprecated function
at32_add_system_devices().
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The favr-32 board code still refers to the old asm/arch header files
which were moved to mach/ some time ago.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add essential system devices, including GPIO controllers, automatically
at core_initcall time. This ensures that the devices are there when the
PIO driver gets initialized at postcore_initcall, fixing a bug exposed
by commit d6634db8fe "avr32: Use
platform_driver_probe for pio platform driver".
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Please consider the following patch which adds support for a new AVR32
based board.
The board is closely based on Atmel's NGW100 reference board, but has an
extra 8MByte FLASH and 128KByte FRAM.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch adds support for the Favr-32 board made by EarthLCD.
This kit, which is also called ezLCD-101, has a 10.4" touch screen LCD panel,
16 MB 32-bit SDRAM, 8 MB parallel flash, Ethernet, audio out, USB device,
SD-card slot, USART and various other connectors for cennecting stuff to SPI,
I2C, GPIO, etc.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch lets the user enable support for EVKLCD100 and EVKLCD101
(refered to by EVKLCD10X). By enabling EVKLCD10X support the LCD
controller and AC97 controller platform devices are added.
The user can also choose between the EVKLCD100 (QVGA display) and the
EVKLCD101 (VGA display), this is added to automagically select the
correct panel timing and resolution parameters.
Enabling support for EVKLCD10X addon board will cripple the MCI platform
device a bit since they share two GPIO lines (detect and write-protect).
These two lines are disabled when EVKLCD10X is enabled.
The default configurations are based upon ATNGW100, but with added AC97C
and LCDC driver. Virtual terminal is also enabled by default for
EVKLCD10X boards.
Verified on hardware with a NGW100 + EVKLCD100/101.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Fix a few instances of board code breakage introduced by the atmel-mci
platform interface changes.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_select_periph() now takes an u32 bitmask rather than a single pin.
This allows to set multiple pins at once.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.
Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.
Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The NGW100 board has jumper J15 (near the reset button) which
is unused. This patch exports it through the GPIO sysfs support
(as /sys/class/gpio/gpio62/value) so that it's easily queried
by boot scripts or whatever might want to know if the jumper
has been installed (value = 0) or not (value = 1, "default").
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
[haavard.skinnemoen@atmel.com: add missing include]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This replaces the pin_config param with an u64 pin_mask in
at32_add_device_lcdc, allowing a board-maintainer to indivually select
specific lcdc pins.
Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Julien May <jmay@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The #ifdef surrounding the code adding the mmc controller had a typo,
causing it to be compiled even when mmc was supposed to be disabled.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Doing this in combination with "atmel_spi: fix hang due to missed
interrupt" appears to eliminate the overruns I'm seeing when using
JFFS2-on-DataFlash as /usr filesystem on the ATNGW100.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Minor cleanups for the MMC/SD support on avr32:
- Make at32_add_device_mci() properly initialize "missing"
platform data ... so boards like STK1002 won't try GPIO 0.
- Switch over to gpio_is_valid() instead of testing for only
one designated value.
- Provide STK1002 platform data for the unlikely case that
switches are set so first Ethernet controller isn't in use.
(That's the only way to get card detect and writeprotect
switch sensing on the STK1000.)
And get rid of one "unused variable" warning.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.
This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.
This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)
Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.
The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.
The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.
Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Jean-Christophe PLAGNIOL-VILLARD