2 Commits (6f832e8aab8c4c6d28629e970e4a85e74a8d0be6)

Author	SHA1	Message	Date
Lennert Buytenhek	573a652fb0	ARM: Add Tauros2 L2 cache controller support ... Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>	15 years ago
Saeed Bishara	edabd38e1a	ARM: add base support for Marvell Dove SoC ... The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>	15 years ago