The SH7757's ETHER and GETHER use common MDIO pin. The MDIO pin is
selected by specific register. So this patch adds new interface in
bb_info, and when the sh_eth driver use the mdio, the register can
be changed by the function.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The previous code had hardcoded the PHY_INTERFACE_MODE_MII of phy_connect.
So some Gigabit PHYs will not behave correctly.
The patch adds the phy_interface in sh_eth_plat_data, so we can select
the phy interface.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The previous code cannot handle the ETHER and GETHER both as same time
because the definitions of register was hardcoded.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change futex_atomic_op_inuser and futex_atomic_cmpxchg_inatomic
prototypes to use u32 types for the futex as this is the data type the
futex core code uses all over the place.
Signed-off-by: Michel Lespinasse <walken@google.com>
Cc: Darren Hart <darren@dvhart.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: David Howells <dhowells@redhat.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Metcalf <cmetcalf@tilera.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <20110311025058.GD26122@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The cmpxchg_futex_value_locked API was funny in that it returned either
the original, user-exposed futex value OR an error code such as -EFAULT.
This was confusing at best, and could be a source of livelocks in places
that retry the cmpxchg_futex_value_locked after trying to fix the issue
by running fault_in_user_writeable().
This change makes the cmpxchg_futex_value_locked API more similar to the
get_futex_value_locked one, returning an error code and updating the
original value through a reference argument.
Signed-off-by: Michel Lespinasse <walken@google.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com> [tile]
Acked-by: Tony Luck <tony.luck@intel.com> [ia64]
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Michal Simek <monstr@monstr.eu> [microblaze]
Acked-by: David Howells <dhowells@redhat.com> [frv]
Cc: Darren Hart <darren@dvhart.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <20110311024851.GC26122@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This is useful for system management software so that it can kick
off things like gettys and everything that's started from a tty,
before we reuse it from/for something else or shut it down.
Without this ioctl it would have to temporarily become the owner of
the tty, then call vhangup() and then give it up again.
Cc: Lennart Poettering <lennart@poettering.net>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch changes the:
- __nosave_begin
- __nosave_end
symbols from 'void' to 'long' as required by the latest
Gcc (4.5.2) which raises the compilation error:
cc1: warnings being treated as errors
arch/sh/kernel/swsusp.c: In function 'pfn_is_nosave':
arch/sh/kernel/swsusp.c:24:28: error: taking address of expression of type 'void'
arch/sh/kernel/swsusp.c:25:26: error: taking address of expression of type 'void'
arch/sh/kernel/swsusp.c:25:26: error: taking address of expression of type 'void'
arch/sh/kernel/swsusp.c:25:26: error: taking address of expression of type 'void'
Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All architecture specific rwsem headers carry the same function
prototypes. Just x86 adds asmregparm, which is an empty define on all
other architectures. S390 has a stale rwsem_downgrade_write()
prototype.
Remove the duplicates and add the prototypes to linux/rwsem.h
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Richard Henderson <rth@twiddle.net>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110126195833.970840140@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Instead of having the same implementation in each architecture, move
it to linux/rwsem.h and remove the duplicates. It's unlikely that an
arch will ever implement something different, but we can deal with
that when it happens.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Turner <mattst88@gmail.com>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110126195833.876773757@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The rwsem initializers and related macros and functions are mostly the
same. Some of them lack the lockdep initializer, but having it in
place does not matter for architectures which do not support lockdep.
powerpc, sparc, x86: No functional change
sh, s390: Removes the duplicate init_rwsem (inline and #define)
alpha, ia64, xtensa: Use the lockdep capable init function in
lib/rwsem.c which is just uninlining the init
function for the LOCKDEP=n case
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Turner <mattst88@gmail.com>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110126195833.771812729@linutronix.de>
The difference between these declarations is the data type of the
count member and the lack of lockdep in some architectures/
long is equivivalent to signed long and the #ifdef guarded dep_map
member does not hurt anyone.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Turner <mattst88@gmail.com>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110126195833.679641914@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
All rwsem implementations include the same headers. Include them from
include/linux/rwsem.h
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Turner <mattst88@gmail.com>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110126195833.483520950@linutronix.de>
We require a forward declaration for mm_struct:
In file included from arch/sh/include/asm/pgtable.h:163,
from arch/sh/include/asm/io.h:21,
from arch/sh/kernel/machvec.c:20:
include/asm-generic/pgtable.h:104: error: 'struct mm_struct' declared inside parameter list
include/asm-generic/pgtable.h: In function 'ptep_get_and_clear_full':
include/asm-generic/pgtable.h:107: error: passing argument 1 of 'ptep_get_and_clear' from incompatible pointer type
include/asm-generic/pgtable.h:70: note: expected 'struct mm_struct *' but argument is of type 'struct mm_struct *'
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add probe support for the sh7372 SH4AL-DSP core.
The most common use case for this is when the system
boots from the ARM core in the sh7372 and uses the
SH core for application offload as a slave CPU.
May also be used to boot the sh7372 from the SH core.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
When p3_ioremap() was converted to ioremap_prot() there was some breakage
introduced where the 29-bit segmentation logic would trap the area range
and return an identity mapping without having allowed the area
specification to force mapping through page tables. This wires up a PCC
mask for pgprot verification to work out whether to short-circuit the
identity mapping on legacy parts, restoring the previous behaviour.
Reported-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently it's still possible to reference the PAGE_KERNEL_PCC pgprot
encoding on X2 TLBs which simply don't support it at all. Convert this
over to follow the nommu behaviour and simply hand back an invalid pgprot
value so we error out properly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
prefetch()/prefetchw() are supposed to take a const void * instead of a
straight void *, which the build recently started complaining about, fix
them up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that all of the in-tree drivers have been converted to portable I/O
accessors, we can kill off the legacy ones with extreme prejudice.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
A definition like:
#define regs_return_value(regs) ((regs)->regs[0])
called with regs_return_value(foo) will be preprocessed to:
((foo)->foo[0])
^^^
So to fix this to ensure the preprocessor compiles such calls correctly.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The current implementation was rather tied to the packed_struct.h
definitions, which immediately began to clash when the packed_struct.h
types changed and drivers began to include packed_struct.h directly.
In order to support this sort of use it's necessary to get out of the way
with regards to namespace collisions, and at the same time we can also
kill off some duplicate code now that the unaligned headers are a bit
more broken out.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The on-board NMI switch is routed through and mangled by the FPGA prior
to its delivery to the NMI pin, so add some glue for the various
configuration options. The default is to unmask it and enable all input
sources.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the ARM change c01778001a
("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the
same rationale:
There are places in Linux where writes to newly allocated page
cache pages happen without a subsequent call to flush_dcache_page()
(several PIO drivers including USB HCD). This patch changes the
meaning of PG_arch_1 to be PG_dcache_clean and always flush the
D-cache for a newly mapped page in update_mmu_cache().
This addresses issues seen with executing binaries from MMC, in
addition to some of the other HCDs that don't explicitly do cache
management for their pipe-in buffers.
Requested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Current clk_ops doesn't support .init which
is used to select external clock on ecovec
without CONFIG_SH_CLK_CPG_LEGACY.
To solve this problem, this patch add div6_reparent_clks
to clock-sh7724.
This patch solve compile error too.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
extern inline doesn't make much sense
Cc: Yusuke Goda <yusuke.goda.sx@renesas.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.
as the code is identical at 99%
put the arch specific code for allocation as example in asm/clkdev.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
GCC's __builtin_prefetch() was introduced a long time ago, all
supported GCC versions have it. So this patch is to use it for
implementing the prefetch on SH2A and SH4.
The current prefetch implementation is almost equivalent with
__builtin_prefetch.
The third parameter in the __builtin_prefetch is the locality
that it's not supported on SH architectures. It has been set
to three and it should be verified if it's suitable for SH2A
as well. I didn't test on this architecture.
The builtin usage should be more efficient that an __asm__
because less barriers, and because the compiler doesn't see the
inst as a "black box" allowing better code generation.
This has been already done on other architectures (see the commit:
0453fb3c52).
Many thanks to Christian Bruel <christain.bruel@st.com> for his
support on evaluate the impact of the gcc built-in on SH4 arch.
No regressions found while testing with LMbench on STLinux targets.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Given that __in_29bit_mode() is a constant for the non-PMB case, we can
simply use the PMB-facing version of phys_addr_mask() and drop the other
variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that nommu selects 32BIT we run in to the situation where SH-2A
supports an uncached identity mapping by way of the BSC, while the SH-2
does not. This provides stubs for the PC manglers and tidies up some of
the system*.h mess in the process.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The nommu code has regressed somewhat in that 29BIT gets set for the
SH-2/2A configs regardless of the fact that they are really 32BIT sans
MMU or PMB. This does a bit of tidying to get nommu properly selecting
32BIT as it was before.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.
With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This code has been untouched since it was merged many years ago, and has
severely bitrotted since, suggesting that the board has no real users
left. Notice of intent to remove has been sent out over the last few
years, with no takers. Kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Only the secureedge5410 was ever supported by this code, so make the
board specification explicit rather than perpetuating a mach group.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
None of these PIO routines do anything other than basic error checking,
get rid of them and use the generic fallbacks.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The microdev only has to contend with silly PIO mangling on anything
within the SuperIO range. As each of the SuperIO modules is already
speciail cased, we just shift that logic over to the ioport map.
With microdev PCI never being merged (and being fudamentally broken in
hardware), and the ethernet chip only doing 16-bit accesses already,
there's no need to maintain any of the extra special casing. Kill it all
off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that sh64 has grown extended page flag support we finally have a free
bit for _PAGE_SPECIAL. Wire it up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Since we no longer need to provide KM_type, the whole pte_*map_nested()
API is now redundant, remove it.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Miller <davem@davemloft.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
CPUs can be in either the legacy 29-bit or 32-bit physical addressing
modes. This follows the x86 approach of tracking the phys bits in cpuinfo
and exposing it to userspace through procfs.
This change was requested to permit kexec-tools to detect the physical
addressing mode in order to determine the appropriate address mangling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Provide a mechanism that allows running code in IRQ context. It is
most useful for NMI code that needs to interact with the rest of the
system -- like wakeup a task to drain buffers.
Perf currently has such a mechanism, so extract that and provide it as
a generic feature, independent of perf so that others may also
benefit.
The IRQ context callback is generated through self-IPIs where
possible, or on architectures like powerpc the decrementer (the
built-in timer facility) is set to generate an interrupt immediately.
Architectures that don't have anything like this get to do with a
callback from the timer tick. These architectures can call
irq_work_run() at the tail of any IRQ handlers that might enqueue such
work (like the perf IRQ handler) to avoid undue latencies in
processing the work.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Kyle McMartin <kyle@mcmartin.ca>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
[ various fixes ]
Signed-off-by: Huang Ying <ying.huang@intel.com>
LKML-Reference: <1287036094.7768.291.camel@yhuang-dev>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This sets up a generic SRAM pool for CPUs and platform code to insert
their otherwise unused memories into. A simple alloc/free interface is
provided (lifed from avr32) for generic code.
This only applies to tiny SRAMs that are otherwise unmanaged, and does
not take in to account the more complex SRAMs sitting behind transfer
engines, or that employ an I/D split.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The SDK7786 FPGA has secondary control over the PCIe clocks, specifically
relating to the slots and oscillator. This ties the FPGA clocks in to the
clock framework and balances the refcounting similar to how the primary
on-chip clocks are managed. While the on-chip clocks are per-port, the
FPGA clock enable/disable is global for the entire block.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SDK7786 supports connecting either slot3 or 4 to the same PCIe port by
way of FPGA muxing. By default the vertical slot 3 on the baseboard is
enabled, so this adds in a command line option for forcibly enabling the
slot 4 edge connector.
If nothing has been specified on the command line, we fall back to
reading the resistor values for card presence to figure out where to
route the port to.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt