The current implementation only assumes one GIC to be present in the
system. However, there are platforms with more than one cascaded interrupt
controllers (RealView/EB MPCore for example).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enable svc access to cp6 via an undefined instruction hook. Do not enable
access for usr code.
This patch also makes iop13xx select PLAT_IOP, this requires a small change
to drivers/i2c/busses/i2c-iop3xx.c.
Per Lennert Buytenhek's note, the cp6 trap routine is moved to arch/arm/plat-iop
Per Nicolas Pitre's note, the cp_wait is skipped since the latency to
return to the faulting function is longer than cp_wait.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Implement a custom ioremap implementation for iop3xx. This saves
establishing new mappings. It also cleans up the PCI IO resource to be a
physical address rather than a virtual address as Russell pointed out on
the original iop13xx port.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the CPU code, and any board specific initialisation
code to change the allocation order of the DMA channels,
or stop a peripheral allocating any DMA at-all.
This is due to the scarce mapping of DMA channels on
some earlier S3C24XX cpus, where the selection changes
depending on the channel in use.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is adding the functions and structures used for handling the
S3C24XX udc driver platform datas.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use defines instead of numbers.
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We don't currently support the noncoherent DMA API, but it needs to
be provided for kernels with devres to link.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is a first cut at making the AT91 code use the generic GPIO calls.
Note that the original AT91 GPIO calls merged the "mux pin as GPIO" and "set
GPIO direction" functionality into one API call, contrary to what's specified
as a cross-platform portable model. So this involved a few non-inlinable
functions.
[akpm@osdl.org: cleanups]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This teaches OMAP how to implement the cross-platform GPIO interfaces.
[akpm@osdl.org: cleanups]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This defines a simple and minimalist programming interface for GPIO APIs:
- Documentation/gpio.txt ... describes things (read it)
- include/asm-arm/gpio.h ... defines the ARM hook, which just punts
to <asm/arch/gpio.h> for any implementation
- include/asm-generic/gpio.h ... implement "can sleep" variants as calling
the normal ones, for systems that don't handle i2c expanders.
The immediate need for such a cross-architecture API convention is to support
drivers that work the same on AT91 ARM and AVR32 AP7000 chips, which embed many
of the same controllers but have different CPUs. However, several other users
have been reported, including a driver for a hardware watchdog chip and some
handhelds.org multi-CPU button drivers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Add the SPI controller driver for Freescale i.MX(S/L/1).
Main features summary:
> Per chip setup via board specific code and/or protocol driver.
> Per transfer setup.
> PIO transfers.
> DMA transfers.
> Managing of NULL tx / rx buffer for rd only / wr only transfers.
This patch replace patch-2.6.20-rc4-spi_imx with the following changes:
> Few cosmetic changes.
> Function map_dma_buffers now return 0 for success and -1 for failure.
> Solved a bug inside spi_imx_probe function (wrong error path).
> Solved a bug inside setup function (bad undo setup for max_speed_hz).
> For read-only transfers, always write zero bytes.
This is almost the same as the 'BIS' version sent by Andrea, except for
updating the 'DUMMY' byte so that read-only transfers shift out zeroes.
That part of the API changed recently, since some half duplex peripheral
chips require that semantic.
Signed-off-by: Andrea Paterniani <a.paterniani@swapp-eng.it>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
dmabounce keeps a per-device structure, and finds the correct
structure by walking a list. Since architectures can now add
fields to struct device, we can attach this structure direct to
the struct device, thereby eliminating the code to search the
list.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the lone, remaining reference to the long-deceased
rwlock_is_locked() macro.
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Rename the variable "sum" in the __range_ok macros to avoid name collisions
causing lots of "symbol shadows an earlier one" warnings by sparse.
Signed-off-by: Tilman Schmidt <tilman@imap.cc>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Andi Kleen <ak@suse.de>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Acked-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The line discipline numbers N_* are currently defined for each architecture
individually, but (except for a seeming mistake) identically, in
asm/termios.h. There is no obvious reason why these numbers should be
architecture specific, nor any apparent relationship with the termios
structure. The total number of these, NR_LDISCS, is defined in linux/tty.h
anyway. So I propose the following patch which moves the definitions of
the individual line disciplines to linux/tty.h too.
Three of these numbers (N_MASC, N_PROFIBUS_FDL, and N_SMSBLOCK) are unused
in the current kernel, but the patch still keeps the complete set in case
there are plans to use them yet.
Signed-off-by: Tilman Schmidt <tilman@imap.cc>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The following patch and script moves the arch/arm/mach-s3c2410
directory into arch/arm/plat-s3c24xx for the generic core code
and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files
Include directory include/asm-arm/plat-s3c24xx is added for the
core include files.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The PAGE_* user page protection macros don't take into account the
configured memory policy and other architecture specific bits like
the global/ASID and shared mapping bits. Instead of constants let
these depend on a variable fixed up at init just like PAGE_KERNEL.
Signed-off-by: Imre Deak <imre.deak@solidboot.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the support for the L210/L220 (outer) cache
controller. The cache range operations are done by index/way since L2
cache controller only accepts physical addresses.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On all targets that sucker boils down to memcpy_fromio(sbk->data, from, len).
The function name is highly misguiding (it _never_ does any checksums), the
last argument is just a noise and simply expanding the call to memcpy_fromio()
gives shorter and more readable source. For a lot of reasons it has almost
no remaining users, so it's better to just outright kill it.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patchs adds some missing register bit defs for the PXA SSP ports audio registers and fixes up some other broken bit definitions as noticed by Russell.
Signed-off-by: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Atmel AT91 and AVR32 processor architectures share many of the same
peripherals. The PDC (Peripheral Data Controller) registers are also
implemented within in a number of the on-chip peripherals (eg, USART,
MMC, SPI, SSC, etc).
In a attempt not to duplicate the register definitions in each
peripheral, or in each architecture, the at91_pdc.h header in
asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with
linux/atmel_pdc.h.
The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*,
and the drivers updated accordingly.
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch renames pxa_gpio_set/get functions defined in drivers/usb/gadget/pxa2xx_udc.h to udc_gpio_set/get.
These functions are moved from drivers/usb/gadget/pxa2xx_udc.h to include/asm-arm/arch-pxa2xx/udc.h
Creates new functions: udc_gpio_to_irq, udc_gpio_init_vbus, udc_gpio_init_pullup in include/asm-arm/arch-pxa2xx/udc.h. These functions are used in drivers/usb/gadget/pxa2xx_udc.c instead of direct low-level (pxa2xx only) functions.
Creates all these udc_gpio_* functions in include/asm-arm/arch-ixp4xx/udc.h. This implementation has no real code because ixp4xx doesn't use vbus - only vbus uses all these gpio functions (and because ixp4xx misses any function which converts number of gpio pin into it's irq).
This is next step to make pxa2xx_udc fully work on ixp4xx platform.
Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the Atmel AT91SAM9263 processor. It is similar to the
AT91SAM9260 but with more integrated peripherals, 5 GPIO banks, etc.
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Atmel AT91SAM9263 processor includes many more integrated
peripherals than Atmel's previous ARM9-based AT91 processors, so this
has necessitated a few changes to the core AT91 support.
These changes are:
* The system peripheral I/O region we remap has increased from
0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF.
* The increased I/O region forces changes to entry-macro.S and
debug-macro.S due to ARM's limited immediate offset addressing
modes.
* Maximum number of GPIO banks increases to 5.
* 2 MMC controllers so the board-setup code needs to specify which
controller it wishes to use when calling at91_add_device_mmc().
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Now that Linux includes support for the Atmel AT91SAM9260 and
AT91SAM9261 processors in addition to the original Atmel AT91RM9200
(with support for more AT91 processors pending), the "mach-at91rm9200"
and "arch-at91rm9200" directories should be renamed to indicate their
more generic nature.
The following git commands should be run BEFORE applying this patch:
git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91
git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix build failure of AT91SAM9260.
The AT91RM9200 ethernet driver (at91_ether.c) stores platform data in a
"struct at91_eth_data" structure, but the AT91SAM9260 (and AT91SAM9263)
ethernet driver (macb.c) [developed on the AVR32 architecture] expects a
"struct eth_platform_data".
Since the platform data of the two drivers is very similar, we continue
to use the "struct at91_eth_data" for all AT91 processors but add a
#define eth_platform_data at91_eth_data
in board.h to keep the MACB driver happy.
Original patch by Jan Altenberg.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The DMA cache handling functions take virtual addresses, but in the
form of unsigned long arguments. This leads to a little confusion
about what exactly they take. So, convert them to take const void *
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The outer cache can be L2 as on RealView/EB MPCore platform or even L3
or further on ARMv7 cores. This patch adds the generic support for
flushing the outer cache in the DMA operations.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to ARM ARM, changes to the CP15 registers are only
guaranteed to be visible after an Instruction Synchronization Barrier
(ISB). This patch adds the ISB at the end of set_cr and
set_copro_access functions and also moves them further down in the
file, below the isb macro definition.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The architecture specification states that TLB operations are
guaranteed to be complete only after the execution of a DSB (Data
Synchronisation Barrier, former Data Write Barrier or Drain Write
Buffer). The branch target cache invalidation is also needed. The ISB
(Instruction Synchronisation Barrier, formerly Prefetch Flush) is
needed unless there will be a return from exception before the
corresponding mapping is used (i.e. user mappings).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The ARM Architecture Reference Manual specifies that a prefetch flush
is needed after changing the DACR register (chapter B2.7.6).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There are three barriers - ISB, DMB and DSB for different
scenarious. This patch adds their definitions in the system.h file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for the Gateworks Avila Network Platform in
a separate set of setup files to the IXDP425. This is necessary now
that a driver for the Avila CF card slot is available. It also adds
support for a minor variant on the Avila board known as the Loft,
which has a different number of maximum PCI devices.
Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
csum_fold doesn't need two assembly instructions to perform its task,
it can simply add the high and low parts together by rotating by 16
bits, and the carry into the upper-16 bits will automatically happen.
Also, since csum_tcpudp_magic() is just csum_tcpudp_nofold + csum_fold,
use those two functions to achieve this. Also note that there is a
csum_fold() at the end of ip_fast_csum() as well, so use the real
csum_fold() there as well.
Boot tested on Versatile.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the glue for ARM11 SMP oprofile support, which also supports the
performance monitor in the coherency unit.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current lazy saving of the VFP registers is no longer possible
with thread migration on SMP. This patch implements a per-CPU
vfp-state pointer and the saving of the VFP registers at every context
switch. The registers restoring is still performed in a lazy way.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Trcd* bits of the S3C24xx BANKCON6 and BANKCON7 registers are misspelled in include/asm-arm/arch-s3c2410/regs-mem.h as Trdc*.
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
GPIO bank A can only be output or a special
function, and the regs-gpio.h header has
mistakenly got this as input or output.
The mistake is carried on into the gpio.c
s3c2410_gpio_cfgpin() call which will set the
wrong value if S3C2410_GPIO_OUTPUT is passed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A couple of whitespace cleanups, mainly in the AT91 header files.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix two typo's where AT01_* was used instead of AT91_*.
[Patch from Wojtek Kaniewski]
Fix definition of AT91_SMC_EXNWMODE for the SAM9 processors.
[Patch from Wu Xuan]
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is an interrupt-driven keyboard driver for simple buttons
connected directly to CPU GPIO lines of embedded ARM systems.
It supports pxa architectures and is used by a number of PDAs
and PocketPC phones in the handhelds.org kernel. Support for
other architectures, such as sa11xx and sc2410, will be added
once generic GPIO API is available.
Signed-off-by: Paul Sokolovsky <pmiscml@gmail.com>
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
fuse does not work on ARM due to cache incoherency issues - fuse wants
to use get_user_pages() to copy data from the current process into
kernel space. However, since this accesses userspace via the kernel
mapping, the kernel mapping can be out of date wrt data written to
userspace.
This can lead to unpredictable behaviour (in the case of fuse) or data
corruption for direct-IO.
This resolves debian bug #402876
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
iop33x gpio offset is correct in include/asm-arm/arch-iop33x/iop33x.h, but
include/asm-arm/hardware/iop3xx.h adds 4.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP.
This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Catalin Marinas