This patch implements the communication with the microcontroller on the
Kurobox Pro and Linkstation Pro/Live boards. This is allowing to send
the commands needed to power-off the board correctly.
Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The mv643xx_eth platform data field ->force_phy_addr only needs
to be set if the passed-in ->phy_addr field is zero (to distinguish
the case of not having specified a phy address
(force_phy_addr = 0) from the case where a phy address of zero needs
to be used (force_phy_addr = 1.))
Also, the ->force_phy_addr field will hopefully disappear in a
future mv643xx_eth reorganisation.
Therefore, this patch deletes the ->force_phy_addr field initialiser
from all Orion board code.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
If all PCI devices are working as expected, the error printks in the
various implementations of ->map_irq() doesn't really provide any
useful info. And if something is not working as expected, turning
on pci=debug gives you more useful information than the printk calls
in ->map_irq(), since the former also tells you which devices _did_
get IRQs successfully assigned. Therefore, delete these printks
entirely.
Spotted by Russell King.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Instead of having board code poke directly into the MPP configuration
registers, and separately calling orion5x_gpio_set_valid_pins() to
indicate which MPP pins can be used as GPIO pins, introduce a helper
function for configuring the roles of each of the MPP pins, and have
that helper function handle gpio validity internally.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
It makes no sense to do PCIe WA window setup in the individual
board support files while the decision whether or not to use the
PCIe WA access method is made in a different place, in the PCIe
support code.
This patch moves the configuration of a PCIe WA window from the
individual Orion board support files to the central Orion PCIe
support code.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
This patch moves initialisation of EHCI/I2C/UART platform devices
from the common orion5x_init() into the board support code.
The rationale behind this is that only the board support code knows
whether certain peripherals have been brought out on the board, and
not initialising peripherals that haven't been brought out is
desirable for example:
- to reduce user confusion (e.g. seeing both 'eth0' and 'eth1'
appear while there is only one ethernet port on the board); and
- to allow for future power savings (peripherals that have not
been brought out can be clock gated off entirely).
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Make it clear that Orion top-level IRQs are level-triggered. This
means that we don't need an ->ack() handler, or at least, we don't
need the ->ack() handler (or the acking part of the ->mask_ack()
handler) to actually do anything.
Given that, we might as well point our ->mask_ack() handler at the
->mask() handler instead of providing a dummy ->ack() handler, since
providing a ->mask_ack() handler on level IRQ sources will prevent
->ack() from ever being called.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Annotate the entries for the 88fr531-vd CPU core in
arch/arm/boot/compressed/head.S and arch/arm/mm/proc-feroceon.S
with the full name of the core.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
The DRAM base address and size fields in the CPU's MBUS bridge have
64KiB granularity, instead of the currently used 16MiB. Since all
of the currently supported MBUS peripherals support 64KiB granularity
as well, this patch changes the Orion address map code to stop
rounding base addresses down and sizes up to multiples of 16MiB.
Found by Ke Wei <kewei@marvell.com>.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
Currently, Orion window setup uses hardcoded window indexes for each
of the boot/cs0/cs1/cs2/PCIe WA windows. The static window allocation
used can clash if board support code will ever attempt to configure
both a dev2 and a PCIe WA window, as both of those use CPU mbus window
#7 at present.
This patch keeps track of the last used window, and opens subsequently
requested windows sequentially, starting from 4. (Windows 0-3 are used
as MEM/IO windows for the PCI/PCIe buses.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
More cosmetic cleanup:
- Replace 8-space indents by proper tab indents.
- In structure initialisers, use a trailing comma for every member.
- Collapse "},\n{" in structure initialiers to "}, {".
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
This is a natural extension following the previous patch.
Non Feroceon based targets are unchanged.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The implementation for memory copy functions on ARM had a (disabled)
provision for aligning the source pointer before loading registers with
data. Turns out that aligning the _destination_ pointer is much more
useful, as the read side is already sufficiently helped with the use of
preload.
So this changes the definition of the CALGN() macro to target the
destination pointer instead, and turns it on for Feroceon processors
where the gain is very noticeable.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
This code is currently disabled, which explains why no one was affected.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Available for !SMP only at the moment.
From Russell:
|Basically, if a thread is running on a CPU, thread_saved_fp() is invalid.
|So, the question is: what guarantees do we have here that 'tsk' is not
|running on another CPU?
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
The list search success check in arch/arm/mach-pxa/ssp.c is wrong: for
example, it didn't recognise failure for me when I requested port 0.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Work around:
arch/arm/mach-pxa/tosa.c: In function `tosa_poweroff':
arch/arm/mach-pxa/tosa.c:470: error: `GPIO_OUT' undeclared (first use in this function)
arch/arm/mach-pxa/tosa.c:470: error: (Each undeclared identifier is reported only once
arch/arm/mach-pxa/tosa.c:470: error: for each function it appears in.)
The proper fix exists in the PXA branch of my kernel git tree, which
will be pushed during the next merge window.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the IORESOURCE_IRQ_HIGHEDGE to the DM9000 IRQ resource
to stop the driver itself complaining it was not given
any flags to use.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the IORESOURCE_IRQ_HIGHEDGE to the DM9000 IRQ resource
to stop the driver itself complaining it was not given
any flags to use.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Export the AT91 clock functions for the AT91X40. Some external code common
to all AT91 family parts relys on this, like the gpio and serial support.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/plat-omap/clock.c:397: warning: "struct cpufreq_frequency_table" declared inside parameter list
arch/arm/plat-omap/clock.c:397: warning: its scope is only this definition or declaration, which is probably not what you want
arch/arm/plat-omap/clock.c: In function `clk_init_cpufreq_table':
arch/arm/plat-omap/clock.c:402: error: structure has no member named `clk_init_cpufreq_table'
arch/arm/plat-omap/clock.c:403: error: structure has no member named `clk_init_cpufreq_table'
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rename the SDI device if on an S3C2440 or S3C2442.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the IRQF_TRIGGER_ type to the DM9000 IRQ resource
to stop the driver itself complaining it was not given
any flags to use.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the IRQF_TRIGGER_ type to the DM9000 IRQ resource
to stop the driver itself complaining it was not given
any flags to use.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As noted by Russell King. These depend on tsc210x drivers
getting integrated first.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
collie.h:
* add some meaningfull names to some gpios
collie.c:
* initialize cpu registers correctly
Signed-off-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Two changes are necessary to enable proper operation of the DM9000 device with
the Colibri PXA 270 board: firstly, the IRQ type needs to be configured for
rising edge interrupts, and secondly this configuration needs to be
communicated through to the DM9000.
[akpm@linux-foundation.org: remove set_irq_type() call as per ben-linux request]
Signed-off-by: Michael Abbott <michael.abbott@diamond.ac.uk>
Cc: Daniel Mack <daniel@caiaq.org>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds the missing MODULE_LICENSE("GPL").
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Whereas most Orion 5x machine support code would initialise the PCI
subsystem with nr_controllers in their struct hw_pci set to 2, the
DNS323 and Kurobox Pro machine support code had nr_controllers set
to 1.
This was presumably done because on those two machines, the PCI(-X)
controller (nr == 1) isn't used, requiring initialisation of only
the PCIe controller (nr == 0.) However, not initialising the PCI(-X)
controller on boards that don't use it leads to a situation where
both the PCIe and the PCI(-X) controller think that their root bus is
zero, and it messes up IRQ assignment.
This patch changes the DNS323 and Kurobox Pro support code to always
use nr_controllers == 2.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The CPU's dma_flush_range() operation needs to clean+invalidate the
given memory area if the cache is in writeback mode, or do just the
invalidate part if the cache is in writethrough mode, but the current
proc-arm{925,926,940,946} (incorrectly) do a cache clean in the
latter case. This patch fixes that.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Martin Michlmayr reported that fuse complains:
ERROR: "copy_page" [fs/fuse/fuse.ko] undefined!
so export the needed function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
irqs.h:
* rename IRQ_LOCOMO_SPI_OVRN to IRQ_LOCOMO_SPI_REND
locomo.h:
* add some definition for locomo spi controller
* correct some errors
locomo.c:
* correct some errors
* add set_type for locomo gpio irq chip
Signed-off-by: Thomas Kunze <thommycheck@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix initialization of framebuffer not calling ioremap_writecombine() function
and not using internal SRAM for at91sam9rl.
This is a little rework of the "Don't initialize a pre-allocated framebuffer"
patch that corrects the call to ioremap_writecombine() function.
It also cuts the use of internal SRAM for at91sam9rl : it is a bit small
for a framebuffer.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
A lot of stuff in spitz/akita/etc. depends on corgi_ssp to be initialised
early. However corgi_ssp initialisation fails, because at that time pxa*-ssp
devices don't have drivers. Move ssp earlier in the makefile so they are
registered before corgi-ssp.
Also move sleep/suspend and cpu-freq to more logical places
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fixed comments on global PRM register usage.
Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch removes following message on dpll5_m2_ck enable and
disable:
clock.c: Enable for dpll5_m2_ck without enable code
clock: clk_disable called on independent clock dpll5_m2_ck
which has no enable_reg
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ssi_l4_ick should have PARENT_CONTROLS_CLOCK flag.
ST_SSI_STDBY bit in idlest register cannot be used in omap2_clk_wait_ready
Signed-off-by: Jouni Högander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Wrong shift values were used for gpio2-6 fclks (gpt2-6 shift).
Signed-off-by: Jouni Högander <jouni.hogander@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Lennert Buytenhek