In the latest changes the code for migrating x86_64 irqs was dropped. This
reads it in a fashion that will work even if we change the vector on level
triggered irqs when we migrate them.
[akpm@osdl.org: build fix]
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch converts all the i386 PIC controllers (except VisWS and Voyager,
which I could not test - but which should still work as old-style IRQ layers)
to the new and simpler irq-chip interrupt handling layer.
[akpm@osdl.org: build fix]
[mingo@elte.hu: enable fasteoi handler for i386 level-triggered IO-APIC irqs]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch converts all the x86_64 PIC controllers layers to the new and
simpler irq-chip interrupt handling layer.
[mingo@elte.hu: The patch also enables the fasteoi handler for x86_64]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Roland Dreier <rolandd@cisco.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
wall_jiffies and jiffies are now equal, so this is a noop...
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Joel Soete points out that we refer to pa_tlb_lock but only define it if
CONFIG_SMP which breaks a uniprocessor build with CONFIG_DEBUG_SPINLOCK
enabled. No module refers to pa_tlb_lock, so we can delete the export.
Signed-off-by: Matthew Wilcox <willy@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
GCC no longer allows a cast as lvalue; fix the same way fs/readdir.c was
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
iounmap's argument needs to be both const and volatile, otherwise we'll
get warnings that we're discarding pointer qualifiers
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Our prior mode of operation didn't allow nested interrupts
because it makes the interrupt code much simpler. However,
nested interrupts are better for latency.
This code uses the EIEM register to simulate level interrupts
and thus achieve nesting.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This version (relative to the current tree):
o eliminates "while (ticks_elapsed)" loop. It's not needed.
o drop "ticks_elapsed" completely from timer_interrupt().
o Estimates elapsed cycles (based on HZ) to see which kind of
math we want to use to calculate "cycles_remainder".
o Fixes a bug where we would loose a tick if we decided
we wanted to skip one interrupt.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
It's just a bit easier to follow and timer code is complex enough.
So far, only tested on A500-5x (64-bit SMP), ie: gettimeoffset() code
hasn't been tested at all.
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
I couldn't find where the itimer was getting started for slave CPUs.
CPU 0 (master) itimer was started in time_init() (arch/parisc/kernel/time.c).
start_cpu_itimer() code was striped from time_init().
Slaves now start their itimer in smp_cpu_init().
This is a first step towards making gettimeoffset() work for SMP.
Next step will be to determine the CR16 (cycle counter)
offsets for each CPU relative to the master (CPU 0).
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Stop using PER_LINUX32 to designate processes needing
compaterizing. Convert is_compat_task to use TIF_32BIT and
set TIF_32BIT in binfmt_elf32.c
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
This patch fixes the pa8800 at a gross level (there are still other
subtle incoherency issues which can still cause crashes and HPMCs).
What it does is try to force eject inequivalent aliases before they
become visible to the L2 cache (which is where we get the incoherence
problems).
A new function (parisc_requires_coherency) is introduced in
asm/processor.h to identify the pa8x00 processors (8800 and 8900)
which have the issue.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Abstract existing shift register left macros as shift register
right are. This lends itself to a nice clean up of some #ifdef
blocks in entry.S
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
It seems PA7200 processors also suppress traps on loads to
%r0. This means we can prefetch for read on these cpus. Of course,
we can't support prefetch for write, since that requires
LOAD DOUBLEWORD which was added with PA2.0
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Add support for MPC832x MDS evaluation board.
This patch depends on the 8360+QE lib patches by Leo.
The MPC832x processors (MPC8323E, MPC8323, MPC8321E, MPC8321) sport
the e300c2 core plus a QUICC Engine (QE). This patch adds support for
the 832x MDS evaluation board.
The 832x MDS dts and defconfig files are pending more tests.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add support for the Freescale e300c2 core found in the MPC832x processor line.
As far as initial kernel support is concerned, the e300c2 core is
identical to the e300c1 found in the mpc834x, except that it's had its
floating point unit chopped off.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add MPC8360EMDS default device-tree source file
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jiang Bo <Tanya.jiang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The patch adds MPC8360EMDS board support.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Yin Olivia <hong-hua.yin@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add QUICC Engine (QE) configuration, header files, and
QE management and library code that are used by QE devices
drivers.
Includes Leo's modifications up to, and including, the
platform_device to of_device adaptation:
"The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support. Qe_lib is used by
QE device drivers such as ucc_geth driver.
This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.
v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.
v3: Address comments from Kumar; Update definition of several
device tree nodes; Copyright style change."
In addition, the following changes have been made:
o removed typedefs
o uint -> u32 conversions
o removed following defines:
QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
because they hid sizeof/in_be32/out_be32 operations from the reader.
o fixed qe_snums_init() serial num assignment to use a const array
o made CONFIG_UCC_FAST select UCC_SLOW
o reduced NR_QE_IC_INTS from 128 to 64
o remove _IO_BASE, etc. defines (not used)
o removed irrelevant comments, added others to resemble removed BD_ defines
o realigned struct definitions in headers
o various other style fixes including things like pinMask -> pin_mask
o fixed a ton of whitespace issues
o marked ioregs as __be32/__be16
o removed platform_device code and redundant get_qe_base()
o removed redundant comments
o added cpu_relax() to qe_reset
o uncasted all get_property() assignments
o eliminated unneeded casts
o eliminated immrbar_phys_to_virt (not used)
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Shlomi Gridish <gridish@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Currently, if xmon has no input device (as is generally the case on
G5 powermacs), and we drop into xmon as a result of a fatal exception,
it will return 1, which die() interprets as "continue without causing
an oops". This fixes it by making xmon() return 0 in the case where
it has no input device.
Signed-off-by: Paul Mackerras <paulus@samba.org>
This should probably say "mpic" to save confusion.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
On powermac, when open firmware is set to use the SCC for console, this
causes the low level udbg early console to read back the speed and
re-use it instead of hard coding 57600 bps. This doesn't (yet) pass the
detected speed all the way to pmac_zilog though.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Recent changes to the PowerPC zImage wrapper broke zImage.coff due to
the addition of new ELF sections that aren't very well converted to
xcoff and not supported by old OpenFirmware. This fixes it by putting
those sections in the xcoff .data.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
My patch to make the early xmon logic work with earlier early param
parsing (480f6f35a1) breaks xmon=off.
No one does this obviously as xmon rocks, but it should really work
as documented.
While fixing that it struck me that we could move the xmon param
handling into xmon.c, and also consolidate the
xmon_init()/do_early_xmon logic into xmon_setup(). This means
xmon=early drops into xmon a little earlier on 32-bit, but it
seems to work just fine.
Tested on PSERIES and CLASSIC32.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch reworks the cell iic interrupt handling so that:
- Node ID is back in the interrupt number (only one IRQ host is created
for all nodes). This allows interrupts from sources on another node to
be routed non-locally. This will allow possibly one day to fix maxcpus=1
or 2 and still get interrupts from devices on BE 1. (A bit more fixing
is needed for that) and it will allow us to implement actual affinity
control of external interrupts.
- Added handling of the IO exceptions interrupts (badly named, but I
re-used the name initially used by STI). Those are the interrupts
exposed by IIC_ISR and IIC_IRR, such as the IOC translation exception,
performance monitor, etc... Those get their special numbers in the IRQ
number space and are internally implemented as a cascade on unit 0xe,
class 1 of each node.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This allows numaq to properly align cpus to their given node during
boot. Pass logical apicid to apicid_to_node and allow the summit
sub-arch to use physical apicid (hard_smp_processor_id()).
Tested against numaq and summit based systems with no issues.
Signed-off-by: Keith Mannthey <kmannth@us.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This changes a couple of if() BUG(); constructs to
BUG_ON(); so it can be safely optimized away.
Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Randy brought it to my attention that in proper english "can not" should always
be written "cannot". I donot see any reason to argue, even if I mightnot
understand why this rule exists. This patch fixes "can not" in several
Documentation files as well as three Kconfigs.
Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
The patch below corrects multiple occurances of "the the"
typos across several files, both in source comments and KConfig files.
There is no actual code changed, only text. Note this only affects the /arch
directory, and I believe I could find many more elsewhere. :)
Signed-off-by: Adrian Bunk <bunk@stusta.de>
This intruduces 82xx family in arch/powerpc/platforms,
and has all the board-specific code to represent regression-less
transaction from ppc. The functionality is apparently the same, including
PCI controller.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
This has modules of common directories related to the
mpc8272ADS board, mainly common cpm2 changes and fsl_soc.c
portions related to the bitbang MDIO and other mechanisms specific
for this family.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
This adds current dts file used with MPC8272ADS,
introducing new mdio bitbang defines, as well as
fully-CPM2-SoC board design.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Sanitise a number of settings for the DECstation.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Eric W. Biederman