This makes it possible to support IRQs coming from off-chip GPIO
controllers.
Signed-off-by: Joachim Eastwood <joachim.eastwood@jotron.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On Blackfin systems, the hardware single step exception triggers before
the system call exception, so we need to save this info to process it
later on. Otherwise, single stepping in userspace misses a few insns
right after the system call.
This is based a bit on the SuperH code added in commit 4b505db9c4.
Reported-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We don't want to let user space modify the SYSCFG register arbitrarily as
the settings are system wide (SNEN/CNEN) and can cause misbehavior. The
only other bit here (SSSTEP) has proper controls via PTRACE_SINGLESTEP.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT,
PTRACE_KILL and PTRACE_SINGLESTEP. This implies defining
arch_has_single_step in <asm/ptrace.h> and implementing the
user_enable_single_step and user_disable_single_step functions, which
also causes the breakpoint information to be cleared on fork, which
could be considered a bug fix.
Also the TIF_SYSCALL_TRACE thread flag is now cleared on PTRACE_KILL
which it previously wasn't which is consistent with all architectures
using the modern ptrace code.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This functions are implicitly called by core functions like cpu_relax(),
and since those functions may be called early on before common code has
initialized the per-cpu data area, we need to tweak the stats gathering.
Now the statistics are maintained in common bss which makes these funcs
safe to use as soon as the C runtime env is setup.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This allows things to be shared between the different watchdog sources.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Restore support for CONFIG_EXCPT_IRQ_SYSC_L1 in the MPU CPLB manager.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some userspace applications use this member in diagnosing crashes. It
also makes some LTP tests pass (i.e. the Blackfin arch behaves more like
everyone else).
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The locking code in the address dumper needs to grab the mm's mmap_sem
so that other CPUs do not get an inconsistent view. On UP systems this
really wasn't a problem, but it is easy to trigger a race on SMP systems
when another CPU removes a mapping.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This condition allowed only decoding of opcode 0x0040
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the common attribute rather than setting the section name directly.
The common linker script defines expect the newer naming.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since we are now discarding .exit.text at runtime instead of link time, we
need to place all .text sections ahead of the .data sections. Otherwise,
a really large attached initramfs may cause link errors as it pushes the
PC relative relocations behind the limits of the Blackfin ISA (~16meg).
The instructions in the .exit.text are unable to call back into the .text
sections leading to a link failure.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
SMP systems require per-cpu local clock event devices in order to enable
HRT support. One a BF561, we can use local core timer for this purpose.
Originally, there was one global core-timer clock event device set up for
core A.
To accomplish this feat, we need to split the gptimer0/core timer logic
so that each is a standalone clock event. There is no requirement that
we only have one clock event source anyways. Once we have this, we just
define per-cpu clock event devices for each local core timer.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The gpio label size is 16 char, but the current code uses a longer name
resulting in chopped display. So use a shorter name.
Reported-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure the non-constant version of the dma_sync functions actually
complete instead of recursively calling itself forever.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We weren't handling the user-specified cache behavior for the reserved
memory regions (via mem=/max_mem=). The no-MPU code already takes care
of this, so add support to the MPU code as well.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Attempting to use the MPU while doing XIP out of parallel flash hooked up
to the async memory bus would often result in random crashes as the MPU
slowly corrupted memory.
The fallout here is that the async banks gain MPU protection from user
space too. So any accesses have to go through the mmap() interface rather
than just using hardcoded pointers.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
In blackfin, kgdb is running in delayed exception IRQ5 other than in
exception IRQ3 directly. Register reti other than retx in pt_regs is
the kgdb return address. So, don't put PC in gdb_regs into retx.
CC: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Blackfin needs it own arch specific probe_kernel_read() and
probe_kernel_write().
This was moved out of the kgdb code and into the
arch/blackfin/maccess.c, because it is a generic kernel api.
The arch specific kgdb.c for blackfin was cleaned of all functions
which exist in the kgdb core that do the same thing after resolving
the probe_kernel_read() and probe_kernel_write(). This also
eliminated the need for most of the #include's.
CC: Sonic Zhang <sonic.adi@gmail.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The next commit will require the use of MODULE_SYMBOL_PREFIX in
.tmp_exports-asm.S. Currently it is mixed in with C structure
definitions in "asm/module.h". Move the definition of this arch option
into Kconfig, so it can be easily accessed by any code.
This also lets modpost.c use the same definition. Previously modpost
relied on a hardcoded list of architectures in mk_elfconfig.c.
A build test for blackfin, one of the two MODULE_SYMBOL_PREFIX archs,
showed the generated code was unchanged. vmlinux was identical save
for build ids, and an apparently randomized suffix on a single "__key"
symbol in the kallsyms data).
Signed-off-by: Alan Jenkins <alan-jenkins@tuffmail.co.uk>
Acked-by: Mike Frysinger <vapier@gentoo.org> (blackfin)
CC: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
The Blackfin sched_clock() func is pretty much a duplicate of the common
version, so just punt it.
Reported-by: David Miller <davem@davemloft.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Normally there is no user-reserved memory after the DMA region which means
there is no user-reserved ICPLB coverage. So the DMA hole can be covered
by the large hole that is always added to cover up to the async bank. We
only need an explicit DMA whole when we also add an explicit mapping for
the user-reserved memory.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- document simple global symbols
- convert printk to pr_*
- clean up spurious whitespace
- use min_t()
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The read_proc and write_proc interfaces are going to be removed in the
common kernel code.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
While fetching instructions at the boundary of L1 instruction SRAM, a false
External Memory Addressing Error might be triggered. We should ignore this
and continue on our way to avoid random crashes.
Because hardware errors are not exact in the Blackfin architecture, we need
to catch a few more common cases when the code flow changes and the signal
is finally delivered.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These regions are either read-only and won't work anyways (bootrom), or
we don't want people screwing with them because they're shared between
all processes (fixed code).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The NOMPU code already supported executing in the async banks, so this
brings the MPU code in line.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The point of this small chunk was to avoid anomaly 05000310. This never
really seemed to do what it was intended though -- no valid CPLBs exist
over the reserved memory, and there is often memory before it anyways (due
to the uClinux MTD and/or reserved DMA region). Plus, it doesn't address
the L1 instruction case.
So drop this chunk as it wastes memory and is affront to humanity.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When working with 8 meg systems, forcing a 1 meg DMA chunk heavily cuts
into the available resources. So support smaller chunks to better cover
needs for these systems.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
No point in returning to userspace just to have it immediately perform the
RTS step. We have to update the PC anyways, so do the RTS too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Joachim Eastwood