3 Commits (177f3b920cf6d1ab6d97f0978f866a8a711918e6)

Author	SHA1	Message	Date
Russell King	ff2e27ae0b	ARM: GIC: consolidate gic_cpu_base_addr to common GIC code ... Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>	14 years ago
Russell King	b580b899dd	ARM: GIC: provide a single initialization function for boot CPU ... Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>	14 years ago
Anton Vorontsov	d94f944e10	ARM: cns3xxx: Add basic support for Cavium Networks CNS3xxx processors ... This patch adds very basic support for ECONA CNS3xxx ARM11 MPcore (ARMv6) dual-core processors. Note that SMP is not yet supported, as well as many peripheral devices. Support for these features will be added later. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>	15 years ago