The quirk was meant to just inhibit some resets, but ended up blocking
all of them. Fortunately, this was just what was needed. Change the
comment to reflect reality.
Also, this issue has just been observed on Samsung laptops, so reduce
the number of chips the quirk affects.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Hook up the controller LED to the LED subsystem, allowing more flexible
control than simply indicating an ongoing request.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some devices have several controllers; need add the index info to
device slot name host->slot_desc[]
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit
aligned (both size and start address). It also doesn't like switching
between PIO and DMA mode, so it needs to be reset after each request.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers have been designed on the assumption that all transfers
will be 32-bit aligned, both in start address and in size. This is not a
guarantee the SDHCI specification provides and not one we can provide.
Revert back to PIO for individual requests in order to work around the
hardware bug.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Do a full scan of the directory to try and be a bit more proactive,
instead of waiting for things to break.
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Commits
58b053e4ce ("Update arch/ to use sg helpers")
45711f1af6 ("[SG] Update drivers to use sg helpers")
fa05f1286b ("Update net/ to use sg helpers")
converted many files to use the scatter gather helpers without ensuring
that the necessary headerfile <linux/scatterlist> is included. This
happened to work for ia64, powerpc, sparc64 and x86 because they
happened to drag in that file via their <asm/dma-mapping.h>.
On most of the others this probably broke.
Instead of increasing the header file spider web I choose to include
<linux/scatterlist.h> directly into the affectes files.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The forcedma and nodma module parameters can be replaced with the quirks
parameter, so remove the redundancy.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers like ENE712 can't work properly with DMA mode,
add this quirk to force these kinds of HW work with PIO mode
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Many host controllers don't fully follow the PCI spec to claim
whether they support DMA in PCI class register. Leave the driver
to judge it from the Capability register, quirks and module parameter
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
It is fully legal for a controller to start issuing data related
interrupts before it has signalled that the command has completed.
Make sure the driver actually can handle this.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some SDHC cards report an invalid maximum block size, in these cases
assume they support block sizes up to 512 bytes instead of returning
an error.
Signed-off-by: David Vrabel <david.vrabel@csr.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The block count register shouldn't be trusted for single block transfers,
so avoid using it completely when calculating transferred bytes.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Added its pci_id and implemented a quirk for it because this
controller needs to reset cmd and data when setting ios.
Signed-off-by: Leandro Dorileo <dorileo@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers signal "command complete" even on failures (which
they are allowed to do according to the spec). Make sure we check
the error bits first so we don't get any false positives.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The controller has a bit indicating that one of the higher bits (the
error bits) are set. A previous bug caused this bit to be masked, but
since that bug has been fixed we have to clear it explicictly.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Whenever a power interrupt is signaled it is also reported as an unexpected
one. All other unexpected interrupts get lost. Cause is a not inversed
bitmask to remove power interrupts from the status.
Signed-off-by: Rolf Eike Beer <eike-kernel@sf-tec.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
ENE has a very weird design where an SDHCI device (0805) is presented
on the PCI bus, but that device is non-functional, and the real device
is hidden as a more generic device.
Signed-off-by: Milko Krachounov <milko@3mhz.net>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
When the device hits certain memory boundaries, it signals an
interrupt and expects to be serviced. We don't need the feature
but we need to make sure the device doesn't stall.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Fix handling of low voltage MMC cards.
The latest MMC and SD specs both agree that support for
low-voltage operations is indicated by bit 7 in the OCR.
The MMC spec states that the low voltage range is
1.65-1.95V while the SD spec leaves the actual voltage
range undefined - meaning that there is still no such
thing as a low voltage SD card.
However, an old Sandisk spec implied that bits 7.0
represented voltages below 2.0V in 1V or 0.5V increments,
and the code was accordingly written with that expectation.
This confusion meant that host drivers attempting to support
the typical low voltage (1.8V) would set the wrong bits in
the host OCR mask (usually bits 5 and/or 6) resulting in the
the low voltage mode never being used.
This change corrects the low voltage range and adds sanity
checks on the reserved bits (0-6) and for SD cards that
claim to support low-voltage operations.
Signed-off-by: Philip Langdale <philipl@overt.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Consolidate the list of available voltages.
Up until now, a separate set of defines has been
used for host->vdd than that used for the OCR
voltage mask values. Having two sets of defines
allows them to get out of sync and the current
sets are already inconsistent with one claiming
to describe ranges and the other specific voltages.
Only the SDHCI driver uses the host->vdd defines and
it is easily fixed to use the OCR defines.
Signed-off-by: Philip Langdale <philipl@overt.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
All host drivers were #include:ing mmc/protocol.h just to
get access to the OCR bit defines. Move these to host.h instead.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
mmc layer may introduce additional (compared to block layer) limits on
request size. Culling of the sg list to match adjusted request size
simplifies the handling of such cases in the low level driver, allowing
it to skip block count checks while processing sg entries.
(fixes for wbsd and sdhci by Pierre Ossman)
Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The interrupt is shared with another device, which resumes earlier than the
sdhci controller, and generates an interrupt.
The sdhci interrupt handler runs, sees 0xffffffff in its own device's
interrupt status, and tries to handle it.. The reason for the 0xffffffff
is that the device is still suspended, and *all* regs are reading back
0xffffffff.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The new high-speed timings are similar to each other and the old
system, but not identical. And although things "just work" most of
the time, sometimes it does not. So we need to start marking which
hosts are known to fully comply with the new timings.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
We get enough error reports without having to ask for it.
Remove notices about mailing the development list.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The driver version was only really meaningful when it was an
out-of-tree driver. Now we can use the version of the kernel.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Since we actively avoid highmem, calling kmap_atomic() instead
of page_address() is effectively only obfuscation.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Many controllers have an upper limit on the number of blocks that can be
transferred in one request. Allow the host drivers to specify this and make
sure we avoid hitting this limit.
Also change the max_sectors field to avoid confusion. This makes it map
less directly to the block layer limits, but as they didn't apply directly
on MMC cards anyway, this isn't a great loss.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Most controllers have an upper limit on the block size. Allow the host
drivers to specify this and make sure we avoid hitting this limit.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Support for these devices was broken for 2.6.18-rc1 and later by commit
146ad66eac, which added voltage level support.
This restores the previous behaviour for these devices by ensuring that when
the voltage is changed, only one write to set the voltage is performed.
It may be that both writes are needed if the voltage is being changed between
two non-zero values or that it's safe to ensure that only one write is done
if the hardware only supports one voltage; I don't know whether either is the
case nor can I test since I have only the one SD reader (1524:0550), and it
supports just the one voltage.
Signed-off-by: Darren Salt <linux@youmustbejoking.demon.co.uk>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Some controllers report an invalid iomem size, but seem to work
correctly anyway. Change our current error to just a warning and
hope it doesn't cause too much problems.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The SDHCI spec implies that is is incorrect to set a clock
frequency above 25 MHz without setting the high speed bit.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Now that mmc_host_ops can be constified, update the various drivers
to constify those method tables and shrink the writable data segment.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Pierre Ossman