The DMABRG is a special DMA unit within the SH7760 which does data transfers from main memory to Audio units and USB shared memory. It has 3 IRQ lines which generate 10 events, which have to be masked unmasked and acked in a single 32bit register. It works independently from the tradition SH DMAC, but blocks usage of DMAC channel 0. This patch adds 2 functions to associate callbacks with DMABRG events and initialization. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>tirimbino
Manuel Lauss
18 years ago
committed by
Paul Mundt
parent
57be2b484a
commit
fc467a2623
@ -0,0 +1,196 @@ |
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/*
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* SH7760 DMABRG IRQ handling |
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* |
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* (c) 2007 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com> |
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* licensed under the GPLv2. |
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* |
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*/ |
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#include <linux/interrupt.h> |
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#include <linux/kernel.h> |
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#include <asm/dma.h> |
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#include <asm/dmabrg.h> |
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#include <asm/io.h> |
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/*
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* The DMABRG is a special DMA unit within the SH7760. It does transfers |
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* from USB-SRAM/Audio units to main memory (and also the LCDC; but that |
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* part is sensibly placed in the LCDC registers and requires no irqs) |
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* It has 3 IRQ lines which trigger 10 events, and works independently |
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* from the traditional SH DMAC (although it blocks usage of DMAC 0) |
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* |
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* BRGIRQID | component | dir | meaning | source |
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* ----------------------------------------------------- |
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* 0 | USB-DMA | ... | xfer done | DMABRGI1 |
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* 1 | USB-UAE | ... | USB addr err.| DMABRGI0 |
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* 2 | HAC0/SSI0 | play| all done | DMABRGI1 |
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* 3 | HAC0/SSI0 | play| half done | DMABRGI2 |
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* 4 | HAC0/SSI0 | rec | all done | DMABRGI1 |
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* 5 | HAC0/SSI0 | rec | half done | DMABRGI2 |
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* 6 | HAC1/SSI1 | play| all done | DMABRGI1 |
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* 7 | HAC1/SSI1 | play| half done | DMABRGI2 |
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* 8 | HAC1/SSI1 | rec | all done | DMABRGI1 |
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* 9 | HAC1/SSI1 | rec | half done | DMABRGI2 |
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* |
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* all can be enabled/disabled in the DMABRGCR register, |
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* as well as checked if they occured. |
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* |
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* DMABRGI0 services USB DMA Address errors, but it still must be |
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* enabled/acked in the DMABRGCR register. USB-DMA complete indicator |
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* is grouped together with the audio buffer end indicators, too bad... |
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* |
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* DMABRGCR: Bits 31-24: audio-dma ENABLE flags, |
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* Bits 23-16: audio-dma STATUS flags, |
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* Bits 9-8: USB error/xfer ENABLE, |
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* Bits 1-0: USB error/xfer STATUS. |
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* Ack an IRQ by writing 0 to the STATUS flag. |
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* Mask IRQ by writing 0 to ENABLE flag. |
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* |
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* Usage is almost like with any other IRQ: |
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* dmabrg_request_irq(BRGIRQID, handler, data) |
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* dmabrg_free_irq(BRGIRQID) |
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* |
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* handler prototype: void brgirqhandler(void *data) |
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*/ |
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#define DMARSRA 0xfe090000 |
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#define DMAOR 0xffa00040 |
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#define DMACHCR0 0xffa0000c |
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#define DMABRGCR 0xfe3c0000 |
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#define DMAOR_BRG 0x0000c000 |
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#define DMAOR_DMEN 0x00000001 |
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#define DMABRGI0 68 |
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#define DMABRGI1 69 |
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#define DMABRGI2 70 |
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struct dmabrg_handler { |
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void (*handler)(void *); |
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void *data; |
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} *dmabrg_handlers; |
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static inline void dmabrg_call_handler(int i) |
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{ |
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dmabrg_handlers[i].handler(dmabrg_handlers[i].data); |
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} |
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/*
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* main DMABRG irq handler. It acks irqs and then |
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* handles every set and unmasked bit sequentially. |
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* No locking and no validity checks; it should be |
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* as fast as possible (audio!) |
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*/ |
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static irqreturn_t dmabrg_irq(int irq, void *data) |
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{ |
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unsigned long dcr; |
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unsigned int i; |
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dcr = ctrl_inl(DMABRGCR); |
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ctrl_outl(dcr & ~0x00ff0003, DMABRGCR); /* ack all */ |
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dcr &= dcr >> 8; /* ignore masked */ |
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/* USB stuff, get it out of the way first */ |
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if (dcr & 1) |
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dmabrg_call_handler(DMABRGIRQ_USBDMA); |
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if (dcr & 2) |
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dmabrg_call_handler(DMABRGIRQ_USBDMAERR); |
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/* Audio */ |
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dcr >>= 16; |
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while (dcr) { |
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i = __ffs(dcr); |
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dcr &= dcr - 1; |
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dmabrg_call_handler(i + DMABRGIRQ_A0TXF); |
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} |
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return IRQ_HANDLED; |
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} |
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static void dmabrg_disable_irq(unsigned int dmairq) |
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{ |
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unsigned long dcr; |
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dcr = ctrl_inl(DMABRGCR); |
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dcr &= ~(1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); |
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ctrl_outl(dcr, DMABRGCR); |
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} |
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static void dmabrg_enable_irq(unsigned int dmairq) |
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{ |
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unsigned long dcr; |
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dcr = ctrl_inl(DMABRGCR); |
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dcr |= (1 << ((dmairq > 1) ? dmairq + 22 : dmairq + 8)); |
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ctrl_outl(dcr, DMABRGCR); |
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} |
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int dmabrg_request_irq(unsigned int dmairq, void(*handler)(void*), |
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void *data) |
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{ |
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if ((dmairq > 9) || !handler) |
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return -ENOENT; |
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if (dmabrg_handlers[dmairq].handler) |
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return -EBUSY; |
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dmabrg_handlers[dmairq].handler = handler; |
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dmabrg_handlers[dmairq].data = data; |
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dmabrg_enable_irq(dmairq); |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(dmabrg_request_irq); |
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void dmabrg_free_irq(unsigned int dmairq) |
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{ |
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if (likely(dmairq < 10)) { |
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dmabrg_disable_irq(dmairq); |
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dmabrg_handlers[dmairq].handler = NULL; |
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dmabrg_handlers[dmairq].data = NULL; |
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} |
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} |
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EXPORT_SYMBOL_GPL(dmabrg_free_irq); |
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static int __init dmabrg_init(void) |
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{ |
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unsigned long or; |
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int ret; |
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dmabrg_handlers = kzalloc(10 * sizeof(struct dmabrg_handler), |
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GFP_KERNEL); |
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if (!dmabrg_handlers) |
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return -ENOMEM; |
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#ifdef CONFIG_SH_DMA |
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/* request DMAC channel 0 before anyone else can get it */ |
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ret = request_dma(0, "DMAC 0 (DMABRG)"); |
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if (ret < 0) |
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printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n"); |
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#endif |
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ctrl_outl(0, DMABRGCR); |
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ctrl_outl(0, DMACHCR0); |
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ctrl_outl(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ |
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/* enable DMABRG mode, enable the DMAC */ |
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or = ctrl_inl(DMAOR); |
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ctrl_outl(or | DMAOR_BRG | DMAOR_DMEN, DMAOR); |
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ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED, |
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"DMABRG USB address error", NULL); |
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if (ret) |
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goto out0; |
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ret = request_irq(DMABRGI1, dmabrg_irq, IRQF_DISABLED, |
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"DMABRG Transfer End", NULL); |
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if (ret) |
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goto out1; |
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ret = request_irq(DMABRGI2, dmabrg_irq, IRQF_DISABLED, |
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"DMABRG Transfer Half", NULL); |
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if (ret == 0) |
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return ret; |
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free_irq(DMABRGI1, 0); |
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out1: free_irq(DMABRGI0, 0); |
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out0: kfree(dmabrg_handlers); |
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return ret; |
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} |
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subsys_initcall(dmabrg_init); |
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@ -0,0 +1,23 @@ |
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/*
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* SH7760 DMABRG (USB/Audio) support |
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*/ |
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#ifndef _DMABRG_H_ |
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#define _DMABRG_H_ |
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/* IRQ sources */ |
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#define DMABRGIRQ_USBDMA 0 |
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#define DMABRGIRQ_USBDMAERR 1 |
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#define DMABRGIRQ_A0TXF 2 |
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#define DMABRGIRQ_A0TXH 3 |
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#define DMABRGIRQ_A0RXF 4 |
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#define DMABRGIRQ_A0RXH 5 |
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#define DMABRGIRQ_A1TXF 6 |
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#define DMABRGIRQ_A1TXH 7 |
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#define DMABRGIRQ_A1RXF 8 |
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#define DMABRGIRQ_A1RXH 9 |
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extern int dmabrg_request_irq(unsigned int, void(*)(void *), void *); |
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extern void dmabrg_free_irq(unsigned int); |
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#endif |
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