Add mdss_rgb driver to drive RGB parallel interface required on qcs405 target. Also added an SPI controller to transfer panel on/off sequences to RGB panel. Change-Id: I5479a05aa9e0fbc922dabed9a4b85cec1fa167d3 Signed-off-by: Rashi Bindra <rbindra@codeaurora.org> Signed-off-by: Narender Ankam <nankam@codeaurora.org>tirimbino
Narender Ankam
7 years ago
parent
4b54d9aab0
commit
f86f7bcd2c
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Qualcomm Technologies, Inc. mdss-rgb |
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mdss-rgb is the master RGB device which supports software RGB interface. |
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Required properties: |
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- compatible: Must be "qcom,mdss-rgb" |
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- ranges: The standard property which specifies the child address |
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- reg: Base address and length of the different register |
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regions(s) required for RGB functionality. |
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- reg-names: A list of strings that map in order to the list of regs. |
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"dsi_phy" - MDSS DSI PHY register region |
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"dsi_phy_regulator" - MDSS DSI PHY REGULATOR region |
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"mmss_misc_phys" - Register region for MMSS DSI clamps |
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- vdda-supply: Phandle for vdda regulator device node. |
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- vddio-supply: Phandle for vddio regulator device node. |
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- qcom,mdss-mdp: pHandle that specifies the mdss-mdp device. |
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- qcom,mdss-fb-map: pHandle that specifies the framebuffer to which the |
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- qcom,platform-reset-gpio: Specifies the panel reset gpio. |
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- pinctrl-names: List of names to assign mdss pin states defined in pinctrl device node |
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Refer to pinctrl-bindings.txt |
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- pinctrl-<0..n>: Lists phandles each pointing to the pin configuration node within a pin |
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controller. These pin configurations are installed in the pinctrl |
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device node. Refer to pinctrl-bindings.txt |
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|
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- qcom,<type>-supply-entries: A node that lists the elements of the supply used by the |
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a particular "type" of RGB modulee. The module "types" |
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can be "core", "ctrl", and "phy". Within the same type, |
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there can be more than one instance of this binding, |
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in which case the entry would be appended with the |
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supply entry index. |
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e.g. qcom,ctrl-supply-entry@0 |
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-- qcom,supply-name: name of the supply (vdd/vdda/vddio) |
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-- qcom,supply-min-voltage: minimum voltage level (uV) |
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-- qcom,supply-max-voltage: maximum voltage level (uV) |
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-- qcom,supply-enable-load: load drawn (uA) from enabled supply |
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-- qcom,supply-disable-load: load drawn (uA) from disabled supply |
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-- qcom,supply-ulp-load: load drawn (uA) from supply in ultra-low power mode |
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-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on |
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-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on |
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-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off |
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-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off |
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Example: |
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mdss_rgb: qcom,mdss_rgb { |
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compatible = "qcom,mdss-rgb"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges = <0x1a94400 0x1a94400 0x280 |
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0x1a94b80 0x1a94b80 0x30 |
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0x193e000 0x193e000 0x30>; |
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reg = <0x1a94400 0x280>, |
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<0x1a94b80 0x30>, |
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<0x193e000 0x30>; |
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reg-names = "dsi_phy", |
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"dsi_phy_regulator", "mmss_misc_phys"; |
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gdsc-supply = <&gdsc_mdss>; |
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vdda-1p2-supply = <&pms405_l4>; |
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vdda-1p8-supply = <&pms405_l5>; |
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vddio-supply = <&pms405_l6>; |
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qcom,mdss-fb-map = <&mdss_fb0>; |
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qcom,mdss-mdp = <&mdss_mdp>; |
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pinctrl-names = "mdss_default", "mdss_sleep"; |
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pinctrl-0 = <&mdss_rgb_active &mdss_rgb_data0_active |
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&mdss_rgb_data1_active &mdss_rgb_data2_active |
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&mdss_rgb_data3_active &mdss_rgb_data4_active |
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&mdss_rgb_data5_active &mdss_rgb_data_b0_active |
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&mdss_rgb_data_b1_active &mdss_rgb_data_b2_active |
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&mdss_rgb_data_b3_active &mdss_rgb_data_b4_active |
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&mdss_rgb_data_b5_active &mdss_rgb_hsync_active |
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&mdss_rgb_vsync_active &mdss_rgb_de_active |
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&mdss_rgb_clk_active>; |
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pinctrl-1 = <&mdss_rgb_suspend &mdss_rgb_data0_suspend |
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&mdss_rgb_data1_suspend &mdss_rgb_data2_suspend |
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&mdss_rgb_data3_suspend &mdss_rgb_data4_suspend |
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&mdss_rgb_data5_suspend &mdss_rgb_data_b0_suspend |
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&mdss_rgb_data_b1_suspend &mdss_rgb_data_b2_suspend |
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&mdss_rgb_data_b3_suspend &mdss_rgb_data_b4_suspend |
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&mdss_rgb_data_b5_suspend &mdss_rgb_hsync_suspend |
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&mdss_rgb_vsync_suspend &mdss_rgb_de_suspend |
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&mdss_rgb_clk_suspend>; |
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qcom,platform-reset-gpio = <&tlmm 58 0>; |
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qcom,core-supply-entries { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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qcom,core-supply-entry@0 { |
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reg = <0>; |
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qcom,supply-name = "gdsc"; |
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qcom,supply-min-voltage = <0>; |
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qcom,supply-max-voltage = <0>; |
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qcom,supply-enable-load = <0>; |
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qcom,supply-disable-load = <0>; |
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}; |
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}; |
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qcom,ctrl-supply-entries { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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qcom,ctrl-supply-entry@0 { |
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reg = <0>; |
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qcom,supply-name = "vdda-1p2"; |
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qcom,supply-min-voltage = <1200000>; |
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qcom,supply-max-voltage = <1200000>; |
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qcom,supply-enable-load = <100000>; |
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qcom,supply-disable-load = <100>; |
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qcom,supply-post-on-sleep = <20>; |
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}; |
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}; |
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qcom,phy-supply-entries { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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qcom,phy-supply-entry@0 { |
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reg = <0>; |
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qcom,supply-name = "vdda-1p8"; |
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qcom,supply-min-voltage = <1800000>; |
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qcom,supply-max-voltage = <1800000>; |
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qcom,supply-enable-load = <100000>; |
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qcom,supply-disable-load = <100>; |
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}; |
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}; |
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}; |
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mdss-rgb-spi is the SPI controller for RGB device which supports control |
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commands communication with RGB panel. |
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Required properties: |
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- compatible: Must be "qcom,mdss-rgb-spi" |
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- spi-max-frequency : Maximum SPI clocking speed of device in Hz |
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Optional properties: |
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- label: A string used to describe the controller used. |
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- spi-cpol : Empty property indicating device requires inverse |
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clock polarity (CPOL) mode |
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- spi-cpha : Empty property indicating device requires shifted |
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clock phase (CPHA) mode |
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Example: |
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mdss_rgb_spi: qcom,mdss_rgb_spi { |
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compatible = "qcom,mdss-rgb-spi"; |
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label = "MDSS SPI QUP1 CLIENT"; |
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spi-max-frequency = <5000000>; |
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} |
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File diff suppressed because it is too large
Load Diff
@ -0,0 +1,104 @@ |
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 and |
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* only version 2 as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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*/ |
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#include "mdss_panel.h" |
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#include "mdss_dsi_clk.h" |
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#include "mdss_dsi.h" |
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#define NONE_PANEL "none" |
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#define DSIPHY_CMN_CTRL_0 0x001c |
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#define DSIPHY_CMN_CTRL_1 0x0020 |
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#define DSIPHY_CMN_LDO_CNTRL 0x004c |
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#define DSIPHY_CMN_GLBL_TEST_CTRL 0x0018 |
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#define DSIPHY_PLL_CLKBUFLR_EN 0x041c |
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struct mdss_rgb_data { |
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int ndx; |
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bool res_init; |
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struct platform_device *pdev; |
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struct spi_device *spi; |
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unsigned char *ctrl_base; |
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struct dss_io_data ctrl_io; |
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struct dss_io_data phy_io; |
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int reg_size; |
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u32 *dbg_bus; |
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int dbg_bus_size; |
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u32 hw_config; /* RGB setup configuration i.e. single*/ |
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u32 pll_src_config; /* PLL source selection for RGB clocks */ |
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u32 hw_rev; /* DSI h/w revision */ |
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struct mdss_panel_data panel_data; |
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bool refresh_clk_rate; |
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struct clk *pixel_clk_rgb; |
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struct clk *byte_clk_rgb; |
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u32 pclk_rate; |
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u32 byte_clk_rate; |
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/* DSI core regulators */ |
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struct dss_module_power panel_power_data; |
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struct dss_module_power power_data[DSI_MAX_PM]; |
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/* DSI bus clocks */ |
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struct clk *mdp_core_clk; |
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struct clk *mnoc_clk; |
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struct clk *ahb_clk; |
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struct clk *axi_clk; |
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struct clk *mmss_misc_ahb_clk; |
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struct clk *ext_pixel0_clk; |
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struct clk *ext_byte0_clk; |
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//struct clk *ext_pixel1_clk;
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struct clk *byte_clk_rcg; |
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struct clk *pixel_clk_rcg; |
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struct clk *byte0_parent; |
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struct clk *pixel0_parent; |
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void *clk_mngr; |
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void *clk_handle; |
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void *mdp_clk_handle; |
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/* Data bus(AXI) scale settings */ |
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struct msm_bus_scale_pdata *bus_scale_table; |
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u32 bus_handle; |
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u32 bus_refcount; |
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int bklt_ctrl; /* backlight ctrl */ |
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int pwm_enabled; |
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struct pwm_device *pwm_bl; |
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struct dsi_pinctrl_res pin_res; |
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u8 ctrl_state; |
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bool core_power; |
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/* GPIOs */ |
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int rst_gpio; |
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int (*on)(struct mdss_panel_data *pdata); |
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int (*off)(struct mdss_panel_data *pdata); |
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}; |
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enum mdss_rgb_hw_config { |
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SINGLE_RGB, |
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}; |
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int mdss_rgb_panel_init(struct device_node *node, |
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struct mdss_rgb_data *rgb_data); |
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int mdss_rgb_clk_refresh(struct mdss_rgb_data *rgb_data); |
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int mdss_rgb_clk_div_config(struct mdss_rgb_data *rgb_data, |
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struct mdss_panel_info *panel_info, int frame_rate); |
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int rgb_panel_device_register(struct platform_device *ctrl_pdev, |
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struct device_node *pan_node, struct mdss_rgb_data *rgb_data); |
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int mdss_rgb_write_command(struct mdss_rgb_data *rgb_data, u8 cmd); |
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int mdss_rgb_write_data(struct mdss_rgb_data *rgb_data, u8 data); |
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int mdss_rgb_read_command(struct mdss_rgb_data *rgb_data, |
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u8 cmd, u8 *data, u8 data_len); |
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@ -0,0 +1,458 @@ |
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 and |
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* only version 2 as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#include <linux/of_device.h> |
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#include <linux/delay.h> |
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#include <video/mipi_display.h> |
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#include <linux/pwm.h> |
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#include "mdss_rgb.h" |
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#define RAMCTRL_CMD 0xb0 |
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#define RGBCTRL_CMD 0xb1 |
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#define PORCTRL_CMD 0xb2 |
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#define GCTRL_CMD 0xb7 |
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#define VCOMS_CMD 0xbb |
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#define LCMCTRL_CMD 0xc0 |
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#define VDVVRHEN_CMD 0xc2 |
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#define VRHS_CMD 0xc3 |
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#define VDVS_CMD 0xc4 |
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#define VCMOFSET_CMD 0xc5 |
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#define FRCTRL2_CMD 0xc6 |
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#define PWCTRL1_CMD 0xd0 |
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#define PVGAMCTRL_CMD 0xe0 |
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#define NVGAMCTRL_CMD 0xe1 |
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#define SPI2EN_CMD 0xe7 |
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#define PWCTRL2_CMD 0xe8 |
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static void mdss_rgb_panel_reset(struct mdss_rgb_data *rgb_data) |
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{ |
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if (gpio_is_valid(rgb_data->rst_gpio)) { |
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gpio_set_value(rgb_data->rst_gpio, 1); |
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usleep_range(10000, 20000); |
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gpio_set_value(rgb_data->rst_gpio, 0); |
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usleep_range(10000, 20000); |
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gpio_set_value(rgb_data->rst_gpio, 1); |
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usleep_range(10000, 20000); |
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} |
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} |
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static int mdss_rgb_panel_on(struct mdss_panel_data *pdata) |
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{ |
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struct mdss_rgb_data *rgb_data = NULL; |
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if (pdata == NULL) { |
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pr_err("%s: invalid mdss panel data\n", __func__); |
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return -EINVAL; |
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} |
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rgb_data = container_of(pdata, struct mdss_rgb_data, |
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panel_data); |
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mdss_rgb_panel_reset(rgb_data); |
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mdss_rgb_write_command(rgb_data, MIPI_DCS_EXIT_SLEEP_MODE); |
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msleep(120); |
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/* display and color format setting */ |
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mdss_rgb_write_command(rgb_data, MIPI_DCS_SET_ADDRESS_MODE); |
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mdss_rgb_write_data(rgb_data, 0x00); |
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mdss_rgb_write_command(rgb_data, MIPI_DCS_SET_PIXEL_FORMAT); |
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mdss_rgb_write_data(rgb_data, 0x06); |
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/* frame rate setting */ |
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/* RAM Control */ |
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mdss_rgb_write_command(rgb_data, RAMCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0x11); |
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mdss_rgb_write_data(rgb_data, 0xf0); |
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/* RGB Interface control */ |
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mdss_rgb_write_command(rgb_data, RGBCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0x4c); |
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mdss_rgb_write_data(rgb_data, 0x05); |
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mdss_rgb_write_data(rgb_data, 0x14); |
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/* Porch setting */ |
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mdss_rgb_write_command(rgb_data, PORCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0x0c); |
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mdss_rgb_write_data(rgb_data, 0x0c); |
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mdss_rgb_write_data(rgb_data, 0x00); |
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mdss_rgb_write_data(rgb_data, 0x33); |
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mdss_rgb_write_data(rgb_data, 0x33); |
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/* Gate Control */ |
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mdss_rgb_write_command(rgb_data, GCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0x35); |
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/* VGH=13.26V, VGL=-10.43V */ |
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/* Power setting */ |
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/* vcom setting */ |
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mdss_rgb_write_command(rgb_data, VCOMS_CMD); |
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mdss_rgb_write_data(rgb_data, 0x19); /* 1.05 */ |
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/* LCM Control */ |
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mdss_rgb_write_command(rgb_data, LCMCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0x2c); |
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/* VDV and VRH Command Enable */ |
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mdss_rgb_write_command(rgb_data, VDVVRHEN_CMD); |
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mdss_rgb_write_data(rgb_data, 0x01); |
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/* VRH Set, VAP(GVDD) & VAN(GVCL) */ |
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mdss_rgb_write_command(rgb_data, VRHS_CMD); |
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mdss_rgb_write_data(rgb_data, 0x1d); |
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/* set VDV */ |
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mdss_rgb_write_command(rgb_data, VDVS_CMD); |
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mdss_rgb_write_data(rgb_data, 0x20); /* VDV=0V */ |
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/* vcom Offset Set */ |
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mdss_rgb_write_command(rgb_data, VCMOFSET_CMD); |
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mdss_rgb_write_data(rgb_data, 0x20); /* vcom Offset=0V */ |
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/* Frame rate control in normal mode */ |
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mdss_rgb_write_command(rgb_data, FRCTRL2_CMD); |
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mdss_rgb_write_data(rgb_data, 0x0f); /* dot inversion & 60Hz */ |
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/* Power control 1 */ |
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mdss_rgb_write_command(rgb_data, PWCTRL1_CMD); |
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mdss_rgb_write_data(rgb_data, 0xa4); |
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/* AVDD=6.8V; AVCL=-4.8V; VDDS=2.3V */ |
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mdss_rgb_write_data(rgb_data, 0xa1); |
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/* Power control 2 */ |
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mdss_rgb_write_command(rgb_data, PWCTRL2_CMD); |
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mdss_rgb_write_data(rgb_data, 0x83); |
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/* Set Gamma */ |
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mdss_rgb_write_command(rgb_data, PVGAMCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0xd2); |
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mdss_rgb_write_data(rgb_data, 0x13); |
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mdss_rgb_write_data(rgb_data, 0x16); |
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mdss_rgb_write_data(rgb_data, 0x0d); |
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mdss_rgb_write_data(rgb_data, 0x0f); |
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mdss_rgb_write_data(rgb_data, 0x38); |
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mdss_rgb_write_data(rgb_data, 0x3d); |
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mdss_rgb_write_data(rgb_data, 0x43); |
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mdss_rgb_write_data(rgb_data, 0x4d); |
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mdss_rgb_write_data(rgb_data, 0x1b); |
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mdss_rgb_write_data(rgb_data, 0x16); |
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mdss_rgb_write_data(rgb_data, 0x14); |
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mdss_rgb_write_data(rgb_data, 0x1b); |
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mdss_rgb_write_data(rgb_data, 0x1f); |
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/* Set Gamma */ |
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mdss_rgb_write_command(rgb_data, NVGAMCTRL_CMD); |
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mdss_rgb_write_data(rgb_data, 0xd2); |
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mdss_rgb_write_data(rgb_data, 0x13); |
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mdss_rgb_write_data(rgb_data, 0x16); |
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mdss_rgb_write_data(rgb_data, 0x0d); |
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mdss_rgb_write_data(rgb_data, 0x0f); |
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mdss_rgb_write_data(rgb_data, 0x38); |
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mdss_rgb_write_data(rgb_data, 0x3d); |
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mdss_rgb_write_data(rgb_data, 0x43); |
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mdss_rgb_write_data(rgb_data, 0x4d); |
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mdss_rgb_write_data(rgb_data, 0x1b); |
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mdss_rgb_write_data(rgb_data, 0x16); |
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mdss_rgb_write_data(rgb_data, 0x14); |
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mdss_rgb_write_data(rgb_data, 0x1b); |
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mdss_rgb_write_data(rgb_data, 0x1f); |
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/* SPI2 Enable */ |
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mdss_rgb_write_command(rgb_data, SPI2EN_CMD); |
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mdss_rgb_write_data(rgb_data, 0x10); /* Enable 2 data lane mode */ |
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mdss_rgb_write_command(rgb_data, MIPI_DCS_SET_DISPLAY_ON); |
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msleep(30); |
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pr_debug("%s: RGB panel power on done\n", __func__); |
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return 0; |
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} |
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|
||||
static int mdss_rgb_panel_off(struct mdss_panel_data *pdata) |
||||
{ |
||||
struct mdss_rgb_data *rgb_data = NULL; |
||||
|
||||
if (pdata == NULL) { |
||||
pr_err("%s: Invalid mdss panel data\n", __func__); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
rgb_data = container_of(pdata, struct mdss_rgb_data, |
||||
panel_data); |
||||
|
||||
mdss_rgb_write_command(rgb_data, MIPI_DCS_SET_DISPLAY_OFF); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int mdss_rgb_panel_timing_from_dt(struct device_node *np, |
||||
struct mdss_panel_timing *pt, |
||||
struct mdss_panel_data *panel_data) |
||||
{ |
||||
u64 tmp64; |
||||
int rc; |
||||
struct mdss_panel_info *pinfo; |
||||
|
||||
pinfo = &panel_data->panel_info; |
||||
|
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-panel-width", &pt->xres); |
||||
if (rc) { |
||||
pr_err("%s:%d, panel width not specified\n", |
||||
__func__, __LINE__); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-panel-height", &pt->yres); |
||||
if (rc) { |
||||
pr_err("%s:%d, panel height not specified\n", |
||||
__func__, __LINE__); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
pt->h_front_porch = 6; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-front-porch", |
||||
&pt->h_front_porch); |
||||
|
||||
pt->h_back_porch = 6; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-back-porch", |
||||
&pt->h_back_porch); |
||||
|
||||
pt->h_pulse_width = 2; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-pulse-width", |
||||
&pt->h_pulse_width); |
||||
|
||||
pt->hsync_skew = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-sync-skew", |
||||
&pt->hsync_skew); |
||||
|
||||
pt->v_back_porch = 6; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-v-back-porch", |
||||
&pt->v_back_porch); |
||||
|
||||
pt->v_front_porch = 6; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-v-front-porch", |
||||
&pt->v_front_porch); |
||||
|
||||
pt->v_pulse_width = 2; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-v-pulse-width", |
||||
&pt->v_pulse_width); |
||||
|
||||
pt->border_left = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-left-border", |
||||
&pt->border_left); |
||||
|
||||
pt->border_right = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-h-right-border", |
||||
&pt->border_right); |
||||
|
||||
pt->border_top = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-v-top-border", |
||||
&pt->border_top); |
||||
|
||||
pt->border_bottom = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-v-bottom-border", |
||||
&pt->border_bottom); |
||||
|
||||
pt->frame_rate = DEFAULT_FRAME_RATE; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-panel-framerate", |
||||
(u32 *)&pt->frame_rate); |
||||
|
||||
rc = of_property_read_u64(np, "qcom,mdss-rgb-panel-clockrate", &tmp64); |
||||
if (rc == -EOVERFLOW) { |
||||
tmp64 = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-panel-clockrate", |
||||
(u32 *)&tmp64); |
||||
} |
||||
pt->clk_rate = !rc ? tmp64 : 0; |
||||
|
||||
pt->name = kstrdup(np->name, GFP_KERNEL); |
||||
pr_debug("%s: found new timing \"%s\"\n", __func__, np->name); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int mdss_rgb_clk_refresh(struct mdss_rgb_data *rgb_data) |
||||
{ |
||||
struct mdss_panel_info *pinfo = NULL; |
||||
struct mdss_panel_data *pdata = &rgb_data->panel_data; |
||||
int rc = 0; |
||||
|
||||
if (!pdata) { |
||||
pr_err("%s: invalid mdss panel data\n", __func__); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
pinfo = &pdata->panel_info; |
||||
|
||||
mdss_rgb_clk_div_config(rgb_data, &pdata->panel_info, |
||||
pdata->panel_info.mipi.frame_rate); |
||||
|
||||
rgb_data->refresh_clk_rate = false; |
||||
rgb_data->pclk_rate = pdata->panel_info.mipi.dsi_pclk_rate; |
||||
rgb_data->byte_clk_rate = pdata->panel_info.clk_rate / 8; |
||||
pr_debug("%s rgb_data->byte_clk_rate=%d rgb_data->pclk_rate=%d\n", |
||||
__func__, rgb_data->byte_clk_rate, rgb_data->pclk_rate); |
||||
|
||||
rc = mdss_dsi_clk_set_link_rate(rgb_data->clk_handle, |
||||
MDSS_DSI_LINK_BYTE_CLK, rgb_data->byte_clk_rate, |
||||
MDSS_DSI_CLK_UPDATE_CLK_RATE_AT_ON); |
||||
if (rc) { |
||||
pr_err("%s: byte_clk - clk_set_rate failed\n", |
||||
__func__); |
||||
return rc; |
||||
} |
||||
|
||||
rc = mdss_dsi_clk_set_link_rate(rgb_data->clk_handle, |
||||
MDSS_DSI_LINK_PIX_CLK, rgb_data->pclk_rate, |
||||
MDSS_DSI_CLK_UPDATE_CLK_RATE_AT_ON); |
||||
if (rc) |
||||
pr_err("%s: pixel_clk - clk_set_rate failed\n", |
||||
__func__); |
||||
return rc; |
||||
} |
||||
|
||||
int mdss_rgb_panel_timing_switch(struct mdss_rgb_data *rgb_data, |
||||
struct mdss_panel_timing *timing) |
||||
{ |
||||
struct mdss_panel_info *pinfo = &rgb_data->panel_data.panel_info; |
||||
struct mdss_panel_data *panel_data = &rgb_data->panel_data; |
||||
|
||||
if (!timing) |
||||
return -EINVAL; |
||||
|
||||
if (timing == panel_data->current_timing) { |
||||
pr_warn("%s: panel timing \"%s\" already set\n", __func__, |
||||
timing->name); |
||||
return 0; /* nothing to do */ |
||||
} |
||||
|
||||
//Copy Timings from display_timing struct to panel_info struct
|
||||
mdss_panel_info_from_timing(timing, pinfo); |
||||
|
||||
panel_data->current_timing = timing; |
||||
if (!timing->clk_rate) |
||||
rgb_data->refresh_clk_rate = true; |
||||
|
||||
mdss_rgb_clk_refresh(rgb_data); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
|
||||
static int mdss_rgb_panel_parse_display_timings(struct device_node *np, |
||||
struct mdss_rgb_data *rgb_data) |
||||
{ |
||||
struct device_node *timings_np; |
||||
struct mdss_panel_data *panel_data = &rgb_data->panel_data; |
||||
int rc = 0; |
||||
|
||||
INIT_LIST_HEAD(&panel_data->timings_list); |
||||
|
||||
timings_np = of_get_child_by_name(np, "qcom,mdss-rgb-display-timings"); |
||||
|
||||
if (!timings_np) { |
||||
/*
|
||||
* display timings node is not available, fallback to reading |
||||
* timings directly from root node instead |
||||
*/ |
||||
struct mdss_panel_timing pt; |
||||
|
||||
memset(&pt, 0, sizeof(struct mdss_panel_timing)); |
||||
|
||||
pr_debug("reading display-timings from panel node\n"); |
||||
rc = mdss_rgb_panel_timing_from_dt(np, &pt, panel_data); |
||||
if (!rc) { |
||||
/*
|
||||
* Switch to the parsed timings |
||||
*/ |
||||
rc = mdss_rgb_panel_timing_switch(rgb_data, &pt); |
||||
} |
||||
} |
||||
|
||||
return rc; |
||||
} |
||||
|
||||
static int mdss_rgb_panel_parse_dt(struct device_node *np, |
||||
struct mdss_rgb_data *rgb_data) |
||||
{ |
||||
int rc = 0; |
||||
struct mdss_panel_info *pinfo = &(rgb_data->panel_data.panel_info); |
||||
|
||||
pinfo->physical_width = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-pan-physical-width-dimension", |
||||
&pinfo->physical_width); |
||||
|
||||
pinfo->physical_height = 0; |
||||
rc = of_property_read_u32(np, "qcom,mdss-pan-physical-height-dimension", |
||||
&pinfo->physical_height); |
||||
|
||||
pinfo->bpp = 24; |
||||
rc = of_property_read_u32(np, "qcom,mdss-rgb-bpp", &pinfo->bpp); |
||||
if (rc) { |
||||
pr_err("%s:%d, bpp not specified\n", __func__, __LINE__); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
pinfo->mipi.mode = DSI_VIDEO_MODE; |
||||
|
||||
switch (pinfo->bpp) { |
||||
case 16: |
||||
pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB565; |
||||
break; |
||||
case 18: |
||||
pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB666; |
||||
break; |
||||
case 24: |
||||
default: |
||||
pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888; |
||||
break; |
||||
} |
||||
|
||||
rc = mdss_rgb_panel_parse_display_timings(np, rgb_data); |
||||
return rc; |
||||
} |
||||
|
||||
int mdss_rgb_panel_init(struct device_node *node, |
||||
struct mdss_rgb_data *rgb_data) |
||||
{ |
||||
int rc = 0; |
||||
static const char *panel_name; |
||||
struct mdss_panel_info *pinfo; |
||||
|
||||
if (!node) { |
||||
pr_err("%s: Invalid device node\n", __func__); |
||||
return -ENODEV; |
||||
} |
||||
|
||||
pinfo = &rgb_data->panel_data.panel_info; |
||||
|
||||
pinfo->panel_name[0] = '\0'; |
||||
panel_name = of_get_property(node, "qcom,mdss-rgb-panel-name", NULL); |
||||
if (!panel_name) { |
||||
pr_info("%s:%d, Panel name not specified\n", |
||||
__func__, __LINE__); |
||||
} else { |
||||
pr_info("%s: Panel Name = %s\n", __func__, panel_name); |
||||
strlcpy(&pinfo->panel_name[0], panel_name, |
||||
sizeof(pinfo->panel_name)); |
||||
} |
||||
|
||||
rc = mdss_rgb_panel_parse_dt(node, rgb_data); |
||||
if (rc) |
||||
return rc; |
||||
|
||||
rgb_data->on = mdss_rgb_panel_on; |
||||
rgb_data->off = mdss_rgb_panel_off; |
||||
return rc; |
||||
} |
||||
Loading…
Reference in new issue