This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SPI controller. When resuming from deepest state, it is required to restore MR register as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>tirimbino
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