Tegra20/Tegra30 supports the spi interface through its SLINK controller. Add spi driver for SLINK controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>tirimbino
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NVIDIA Tegra20/Tegra30 SLINK controller. |
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Required properties: |
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- compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink". |
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- reg: Should contain SLINK registers location and length. |
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- interrupts: Should contain SLINK interrupts. |
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- nvidia,dma-request-selector : The Tegra DMA controller's phandle and |
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request selector for this SLINK controller. |
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Recommended properties: |
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- spi-max-frequency: Definition as per |
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Documentation/devicetree/bindings/spi/spi-bus.txt |
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Example: |
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slink@7000d600 { |
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compatible = "nvidia,tegra20-slink"; |
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reg = <0x7000d600 0x200>; |
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interrupts = <0 82 0x04>; |
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nvidia,dma-request-selector = <&apbdma 16>; |
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spi-max-frequency = <25000000>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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status = "disabled"; |
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}; |
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/*
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* spi-tegra.h: SPI interface for Nvidia Tegra20 SLINK controller. |
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* |
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* Copyright (C) 2011 NVIDIA Corporation |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along |
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* with this program; if not, write to the Free Software Foundation, Inc., |
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
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*/ |
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#ifndef _LINUX_SPI_TEGRA_H |
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#define _LINUX_SPI_TEGRA_H |
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struct tegra_spi_platform_data { |
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int dma_req_sel; |
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unsigned int spi_max_frequency; |
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}; |
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/*
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* Controller data from device to pass some info like |
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* hw based chip select can be used or not and if yes |
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* then CS hold and setup time. |
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*/ |
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struct tegra_spi_device_controller_data { |
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bool is_hw_based_cs; |
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int cs_setup_clk_count; |
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int cs_hold_clk_count; |
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}; |
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#endif /* _LINUX_SPI_TEGRA_H */ |
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