@ -33,68 +33,42 @@
static const iomux_cfg_t mx28evk_pads [ ] __initconst = {
/* duart */
MX28_PAD_PWM0__DUART_RX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_PWM1__DUART_TX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL ,
MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL ,
/* auart0 */
MX28_PAD_AUART0_RX__AUART0_RX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART0_TX__AUART0_TX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART0_CTS__AUART0_CTS |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART0_RTS__AUART0_RTS |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL ,
MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL ,
MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL ,
MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL ,
/* auart3 */
MX28_PAD_AUART3_RX__AUART3_RX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART3_TX__AUART3_TX |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART3_CTS__AUART3_CTS |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART3_RTS__AUART3_RTS |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL ,
MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL ,
MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL ,
MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL ,
# define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
/* fec0 */
MX28_PAD_ENET0_MDC__ENET0_MDC |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_MDIO__ENET0_MDIO |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_RXD0__ENET0_RXD0 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_RXD1__ENET0_RXD1 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_TX_EN__ENET0_TX_EN |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_TXD0__ENET0_TXD0 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_TXD1__ENET0_TXD1 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET_CLK__CLKCTRL_ENET |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC ,
MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC ,
MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC ,
MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC ,
MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC ,
MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC ,
MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC ,
MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC ,
MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC ,
/* fec1 */
MX28_PAD_ENET0_CRS__ENET1_RX_EN |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_RXD2__ENET1_RXD0 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_RXD3__ENET1_RXD1 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_COL__ENET1_TX_EN |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_TXD2__ENET1_TXD0 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_TXD3__ENET1_TXD1 |
( MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP ) ,
MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC ,
MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC ,
MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC ,
MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC ,
MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC ,
MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC ,
/* phy power line */
MX28_PAD_SSP1_DATA3__GPIO_2_15 |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL ,
/* phy reset line */
MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
( MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL ) ,
MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL ,
} ;
/* fec */