@ -118,7 +118,7 @@ enum {
PIIX_80C_SEC = ( 1 < < 7 ) | ( 1 < < 6 ) ,
/* controller IDs */
piix_pata_33 = 0 , /* PIIX3 or 4 at 33Mhz */
piix_pata_33 = 0 , /* PIIX4 at 33Mhz */
ich_pata_33 = 1 , /* ICH up to UDMA 33 only */
ich_pata_66 = 2 , /* ICH up to 66 Mhz */
ich_pata_100 = 3 , /* ICH up to UDMA 100 */
@ -128,6 +128,7 @@ enum {
ich6_sata_ahci = 7 ,
ich6m_sata_ahci = 8 ,
ich8_sata_ahci = 9 ,
piix_pata_mwdma = 10 , /* PIIX3 MWDMA only */
/* constants for mapping table */
P0 = 0 , /* port 0 */
@ -165,6 +166,8 @@ static unsigned int in_module_init = 1;
static const struct pci_device_id piix_pci_tbl [ ] = {
# ifdef ATA_ENABLE_PATA
/* Intel PIIX3 for the 430HX etc */
{ 0x8086 , 0x7010 , PCI_ANY_ID , PCI_ANY_ID , 0 , 0 , piix_pata_mwdma } ,
/* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */
/* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */
{ 0x8086 , 0x7111 , PCI_ANY_ID , PCI_ANY_ID , 0 , 0 , piix_pata_33 } ,
@ -441,7 +444,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
} ;
static struct ata_port_info piix_port_info [ ] = {
/* piix_pata_33: 0: PIIX3 or 4 at 33MHz */
/* piix_pata_33: 0: PIIX4 at 33MHz */
{
. sht = & piix_sht ,
. flags = PIIX_PATA_FLAGS ,
@ -543,6 +546,14 @@ static struct ata_port_info piix_port_info[] = {
. port_ops = & piix_sata_ops ,
} ,
/* piix_pata_mwdma: 10: PIIX3 MWDMA only */
{
. sht = & piix_sht ,
. flags = PIIX_PATA_FLAGS ,
. pio_mask = 0x1f , /* pio0-4 */
. mwdma_mask = 0x06 , /* mwdma1-2 ?? CHECK 0 should be ok but slow */
. port_ops = & piix_pata_ops ,
} ,
} ;
static struct pci_bits piix_enable_bits [ ] = {
@ -787,7 +798,8 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
{ 2 , 3 } , } ;
pci_read_config_word ( dev , master_port , & master_data ) ;
pci_read_config_byte ( dev , 0x48 , & udma_enable ) ;
if ( ap - > udma_mask )
pci_read_config_byte ( dev , 0x48 , & udma_enable ) ;
if ( speed > = XFER_UDMA_0 ) {
unsigned int udma = adev - > dma_mode - XFER_UDMA_0 ;