net: aquantia: support for 32-bit ARM target

Add support to build the Aquantia forwarding driver for 32-bit
ARM target.

CRs-Fixed: 2309519
Change-Id: I4e0596a23fe96f81db12260b210d5cfd6e56b205
Signed-off-by: Jinesh K. Jayakumar <jineshk@codeaurora.org>
tirimbino
Jinesh K. Jayakumar 6 years ago
parent 8439d0748f
commit cfca7b85a9
  1. 2
      drivers/net/ethernet/aquantia/Kconfig
  2. 4
      drivers/net/ethernet/aquantia/atlantic-fwd/atl_fwd.c
  3. 4
      drivers/net/ethernet/aquantia/atlantic-fwd/atl_ring.c

@ -23,7 +23,7 @@ config AQTION
config AQFWD
tristate "aQuantia Forwarding driver"
depends on PCI && (X86_64 || ARM64)
depends on PCI && (X86_64 || ARM64 || ARM)
---help---
This enables the support for forwarding driver for the aQuantia AQtion(tm) Ethernet card.

@ -193,7 +193,7 @@ static void atl_fwd_init_ring(struct atl_fwd_ring *fwd_ring)
int lxo_bit = !!(flags & ATL_FWR_LXO);
atl_write(hw, ATL_RING_BASE_LSW(ring), ring->daddr);
atl_write(hw, ATL_RING_BASE_MSW(ring), ring->daddr >> 32);
atl_write(hw, ATL_RING_BASE_MSW(ring), (u64)ring->daddr >> 32);
if (dir_tx) {
atl_write(hw, ATL_TX_RING_THRESH(ring),
@ -511,7 +511,7 @@ int atl_fwd_request_event(struct atl_fwd_event *evt)
atl_write(hw, ATL_TX_RING_HEAD_WB_LSW(hwring),
evt->tx_head_wrb);
atl_write(hw, ATL_TX_RING_HEAD_WB_MSW(hwring),
evt->tx_head_wrb >> 32);
(u64)evt->tx_head_wrb >> 32);
return 0;
}

@ -1492,7 +1492,7 @@ static void atl_start_rx_ring(struct atl_desc_ring *ring)
unsigned int rx_ctl;
atl_write(hw, ATL_RING_BASE_LSW(ring), ring->hw.daddr);
atl_write(hw, ATL_RING_BASE_MSW(ring), ring->hw.daddr >> 32);
atl_write(hw, ATL_RING_BASE_MSW(ring), (u64)ring->hw.daddr >> 32);
atl_write(hw, ATL_RX_RING_TAIL(ring), ring->tail);
atl_write(hw, ATL_RX_RING_BUF_SIZE(ring),
@ -1515,7 +1515,7 @@ static void atl_start_tx_ring(struct atl_desc_ring *ring)
struct atl_hw *hw = &nic->hw;
atl_write(hw, ATL_RING_BASE_LSW(ring), ring->hw.daddr);
atl_write(hw, ATL_RING_BASE_MSW(ring), ring->hw.daddr >> 32);
atl_write(hw, ATL_RING_BASE_MSW(ring), (u64)ring->hw.daddr >> 32);
/* Enable TSO on all active Tx rings */
atl_write(hw, ATL_TX_LSO_CTRL, BIT(nic->nvecs) - 1);

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