NUMA
- Allow numa_node override via sysfs (Prarit Bhargava)
Resource management
- Restore detection of read-only BARs (Myron Stowe)
- Shrink decoding-disabled window while sizing BARs (Myron Stowe)
- Add informational printk for invalid BARs (Myron Stowe)
- Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe)
MSI
- Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang)
- Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang)
- s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang)
Virtualization
- xen: Process failure for pcifront_(re)scan_root() (Chen Gang)
- Make FLR and AF FLR reset warning messages different (Gavin Shan)
Generic host bridge driver
- Allocate config space windows after limiting bus number range (Lorenzo Pieralisi)
- Convert to DT resource parsing API (Lorenzo Pieralisi)
Freescale Layerscape
- Add Freescale Layerscape PCIe driver (Minghuan Lian)
NVIDIA Tegra
- Do not build on 64-bit ARM (Thierry Reding)
- Add Kconfig help text (Thierry Reding)
Renesas R-Car
- Make rcar_pci static (Jingoo Han)
Samsung Exynos
- Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han)
ST Microelectronics SPEAr13xx
- Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han)
- Make spear13xx_add_pcie_port() __init (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
TI DRA7xx
- Add dra7xx prefix to add_pcie_port() (Jingoo Han)
- Make dra7xx_add_pcie_port() __init (Jingoo Han)
TI Keystone
- Make ks_dw_pcie_msi_domain_ops static (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
Miscellaneous
- Delete unnecessary NULL pointer checks (Markus Elfring)
- Remove unused to_hotplug_slot() (Gavin Shan)
- Whitespace cleanup (Jingoo Han)
- Simplify if-return sequences (Quentin Lambert)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUhik9AAoJEFmIoMA60/r8tAQQAJ3Rv5MlHt63cXxgIMOcoLrR
OsFvW+2oMTyUkGg69SgI3YfF9IBjdwkJ3U6OnpfPGcbKyQvmSTxwCEZPVYM9r3mC
1UknItYLXSFsz682sXGrepHoL/N3Im0fhu56oEJwIL+htHNMgGKk+Sk6yW9rBVvz
J7fw31mlrs5YnjkLvwbDjmS3fpCmjqb5fkNlZHxwKcPtM/ODfbRnYYvSucN9Relt
xy2MyuXlZvp7aPwi03z7utZx1ezjzfVlGNlCWyVINERvqbKYeIrAGbfwmVdCVRRf
2kqNS5N6B1IHq6iHg5xbjh9ZOdzYu2bPO4v7qgDEUDWzT0JTes4mOrv5NJWk4ZV/
0erFLOkaCzHpriAXYN8qSfJilm40EYt+hKQI3f8jaTEOycOTWgOcVh9ci7uaNWgX
6Ia9Ch+FXbMg3deL+MwfFQFNbkMzgeNihLZW7xf54psWJobQ3v4eG2KTRqCaOqI0
87tMWPSzOqqnQEUWGw0rTSS7P5UxgKc27Qw83OaaIMz8G3ibSc4VhZT/PpBCQog9
M6ezsxNhJ6rj/81mM5jElzGHQeHUnsAahcQscvva07q6UcRx7JhWVLW0E6l+gyD+
u1XWZQi5b3PwVlJRyv3sKgFpFjsH8pu7wBL8F13NHd0eb4M5m3ZUZmBbXktF0dLc
V0H7kqLWqkTCXo7omekm
=kKg9
-----END PGP SIGNATURE-----
Merge tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
"Here are the PCI changes intended for v3.19. I don't think there's
anything very exciting here, but there was a lot of MSI-related stuff
coming via Thomas.
Details:
NUMA
- Allow numa_node override via sysfs (Prarit Bhargava)
Resource management
- Restore detection of read-only BARs (Myron Stowe)
- Shrink decoding-disabled window while sizing BARs (Myron Stowe)
- Add informational printk for invalid BARs (Myron Stowe)
- Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe)
MSI
- Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang)
- Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang)
- s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang)
Virtualization
- xen: Process failure for pcifront_(re)scan_root() (Chen Gang)
- Make FLR and AF FLR reset warning messages different (Gavin Shan)
Generic host bridge driver
- Allocate config space windows after limiting bus number range (Lorenzo Pieralisi)
- Convert to DT resource parsing API (Lorenzo Pieralisi)
Freescale Layerscape
- Add Freescale Layerscape PCIe driver (Minghuan Lian)
NVIDIA Tegra
- Do not build on 64-bit ARM (Thierry Reding)
- Add Kconfig help text (Thierry Reding)
Renesas R-Car
- Make rcar_pci static (Jingoo Han)
Samsung Exynos
- Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han)
ST Microelectronics SPEAr13xx
- Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han)
- Make spear13xx_add_pcie_port() __init (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
TI DRA7xx
- Add dra7xx prefix to add_pcie_port() (Jingoo Han)
- Make dra7xx_add_pcie_port() __init (Jingoo Han)
TI Keystone
- Make ks_dw_pcie_msi_domain_ops static (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
Miscellaneous
- Delete unnecessary NULL pointer checks (Markus Elfring)
- Remove unused to_hotplug_slot() (Gavin Shan)
- Whitespace cleanup (Jingoo Han)
- Simplify if-return sequences (Quentin Lambert)"
* tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (28 commits)
PCI: Remove fixed parameter in pci_iov_resource_bar()
PCI: Add informational printk for invalid BARs
PCI: tegra: Add Kconfig help text
PCI: tegra: Do not build on 64-bit ARM
PCI: spear: Remove unnecessary OOM message
PCI: mvebu: Add a blank line after declarations
PCI: designware: Add a blank line after declarations
PCI: exynos: Remove unnecessary return statement
PCI: imx6: Use tabs for indentation
PCI: keystone: Remove unnecessary OOM message
PCI: Remove unused and broken to_hotplug_slot()
PCI: Make FLR and AF FLR reset warning messages different
PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port()
PCI: spear: Add __init annotation to spear13xx_add_pcie_port()
PCI: spear: Rename add_pcie_port(), pcie_init() to spear13xx_add_pcie_port(), etc.
PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port()
PCI: layerscape: Add Freescale Layerscape PCIe driver
PCI: Simplify if-return sequences
PCI: Delete unnecessary NULL pointer checks
PCI: Shrink decoding-disabled window while sizing BARs
...
tirimbino
Linus Torvalds
10 years ago
commit
c75059c462
@ -0,0 +1,42 @@ |
||||
Freescale Layerscape PCIe controller |
||||
|
||||
This PCIe host controller is based on the Synopsis Designware PCIe IP |
||||
and thus inherits all the common properties defined in designware-pcie.txt. |
||||
|
||||
Required properties: |
||||
- compatible: should contain the platform identifier such as "fsl,ls1021a-pcie" |
||||
- reg: base addresses and lengths of the PCIe controller |
||||
- interrupts: A list of interrupt outputs of the controller. Must contain an |
||||
entry for each entry in the interrupt-names property. |
||||
- interrupt-names: Must include the following entries: |
||||
"intr": The interrupt that is asserted for controller interrupts |
||||
- fsl,pcie-scfg: Must include two entries. |
||||
The first entry must be a link to the SCFG device node |
||||
The second entry must be '0' or '1' based on physical PCIe controller index. |
||||
This is used to get SCFG PEXN registers |
||||
|
||||
Example: |
||||
|
||||
pcie@3400000 { |
||||
compatible = "fsl,ls1021a-pcie", "snps,dw-pcie"; |
||||
reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ |
||||
0x40 0x00000000 0x0 0x00002000>; /* configuration space */ |
||||
reg-names = "regs", "config"; |
||||
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ |
||||
interrupt-names = "intr"; |
||||
fsl,pcie-scfg = <&scfg 0>; |
||||
#address-cells = <3>; |
||||
#size-cells = <2>; |
||||
device_type = "pci"; |
||||
num-lanes = <4>; |
||||
bus-range = <0x0 0xff>; |
||||
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ |
||||
0xc2000000 0x0 0x20000000 0x40 0x20000000 0x0 0x20000000 /* prefetchable memory */ |
||||
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ |
||||
#interrupt-cells = <1>; |
||||
interrupt-map-mask = <0 0 0 7>; |
||||
interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, |
||||
<0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, |
||||
<0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, |
||||
<0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |
||||
}; |
||||
@ -0,0 +1,179 @@ |
||||
/*
|
||||
* PCIe host controller driver for Freescale Layerscape SoCs |
||||
* |
||||
* Copyright (C) 2014 Freescale Semiconductor. |
||||
* |
||||
* Author: Minghuan Lian <Minghuan.Lian@freescale.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
#include <linux/kernel.h> |
||||
#include <linux/delay.h> |
||||
#include <linux/interrupt.h> |
||||
#include <linux/module.h> |
||||
#include <linux/of_pci.h> |
||||
#include <linux/of_platform.h> |
||||
#include <linux/of_irq.h> |
||||
#include <linux/of_address.h> |
||||
#include <linux/pci.h> |
||||
#include <linux/platform_device.h> |
||||
#include <linux/resource.h> |
||||
#include <linux/mfd/syscon.h> |
||||
#include <linux/regmap.h> |
||||
|
||||
#include "pcie-designware.h" |
||||
|
||||
/* PEX1/2 Misc Ports Status Register */ |
||||
#define SCFG_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4) |
||||
#define LTSSM_STATE_SHIFT 20 |
||||
#define LTSSM_STATE_MASK 0x3f |
||||
#define LTSSM_PCIE_L0 0x11 /* L0 state */ |
||||
|
||||
/* Symbol Timer Register and Filter Mask Register 1 */ |
||||
#define PCIE_STRFMR1 0x71c |
||||
|
||||
struct ls_pcie { |
||||
struct list_head node; |
||||
struct device *dev; |
||||
struct pci_bus *bus; |
||||
void __iomem *dbi; |
||||
struct regmap *scfg; |
||||
struct pcie_port pp; |
||||
int index; |
||||
int msi_irq; |
||||
}; |
||||
|
||||
#define to_ls_pcie(x) container_of(x, struct ls_pcie, pp) |
||||
|
||||
static int ls_pcie_link_up(struct pcie_port *pp) |
||||
{ |
||||
u32 state; |
||||
struct ls_pcie *pcie = to_ls_pcie(pp); |
||||
|
||||
regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state); |
||||
state = (state >> LTSSM_STATE_SHIFT) & LTSSM_STATE_MASK; |
||||
|
||||
if (state < LTSSM_PCIE_L0) |
||||
return 0; |
||||
|
||||
return 1; |
||||
} |
||||
|
||||
static void ls_pcie_host_init(struct pcie_port *pp) |
||||
{ |
||||
struct ls_pcie *pcie = to_ls_pcie(pp); |
||||
int count = 0; |
||||
u32 val; |
||||
|
||||
dw_pcie_setup_rc(pp); |
||||
|
||||
while (!ls_pcie_link_up(pp)) { |
||||
usleep_range(100, 1000); |
||||
count++; |
||||
if (count >= 200) { |
||||
dev_err(pp->dev, "phy link never came up\n"); |
||||
return; |
||||
} |
||||
} |
||||
|
||||
/*
|
||||
* LS1021A Workaround for internal TKT228622 |
||||
* to fix the INTx hang issue |
||||
*/ |
||||
val = ioread32(pcie->dbi + PCIE_STRFMR1); |
||||
val &= 0xffff; |
||||
iowrite32(val, pcie->dbi + PCIE_STRFMR1); |
||||
} |
||||
|
||||
static struct pcie_host_ops ls_pcie_host_ops = { |
||||
.link_up = ls_pcie_link_up, |
||||
.host_init = ls_pcie_host_init, |
||||
}; |
||||
|
||||
static int ls_add_pcie_port(struct ls_pcie *pcie) |
||||
{ |
||||
struct pcie_port *pp; |
||||
int ret; |
||||
|
||||
pp = &pcie->pp; |
||||
pp->dev = pcie->dev; |
||||
pp->dbi_base = pcie->dbi; |
||||
pp->root_bus_nr = -1; |
||||
pp->ops = &ls_pcie_host_ops; |
||||
|
||||
ret = dw_pcie_host_init(pp); |
||||
if (ret) { |
||||
dev_err(pp->dev, "failed to initialize host\n"); |
||||
return ret; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int __init ls_pcie_probe(struct platform_device *pdev) |
||||
{ |
||||
struct ls_pcie *pcie; |
||||
struct resource *dbi_base; |
||||
u32 index[2]; |
||||
int ret; |
||||
|
||||
pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL); |
||||
if (!pcie) |
||||
return -ENOMEM; |
||||
|
||||
pcie->dev = &pdev->dev; |
||||
|
||||
dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); |
||||
if (!dbi_base) { |
||||
dev_err(&pdev->dev, "missing *regs* space\n"); |
||||
return -ENODEV; |
||||
} |
||||
|
||||
pcie->dbi = devm_ioremap_resource(&pdev->dev, dbi_base); |
||||
if (IS_ERR(pcie->dbi)) |
||||
return PTR_ERR(pcie->dbi); |
||||
|
||||
pcie->scfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, |
||||
"fsl,pcie-scfg"); |
||||
if (IS_ERR(pcie->scfg)) { |
||||
dev_err(&pdev->dev, "No syscfg phandle specified\n"); |
||||
return PTR_ERR(pcie->scfg); |
||||
} |
||||
|
||||
ret = of_property_read_u32_array(pdev->dev.of_node, |
||||
"fsl,pcie-scfg", index, 2); |
||||
if (ret) |
||||
return ret; |
||||
pcie->index = index[1]; |
||||
|
||||
ret = ls_add_pcie_port(pcie); |
||||
if (ret < 0) |
||||
return ret; |
||||
|
||||
platform_set_drvdata(pdev, pcie); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static const struct of_device_id ls_pcie_of_match[] = { |
||||
{ .compatible = "fsl,ls1021a-pcie" }, |
||||
{ }, |
||||
}; |
||||
MODULE_DEVICE_TABLE(of, ls_pcie_of_match); |
||||
|
||||
static struct platform_driver ls_pcie_driver = { |
||||
.driver = { |
||||
.name = "layerscape-pcie", |
||||
.owner = THIS_MODULE, |
||||
.of_match_table = ls_pcie_of_match, |
||||
}, |
||||
}; |
||||
|
||||
module_platform_driver_probe(ls_pcie_driver, ls_pcie_probe); |
||||
|
||||
MODULE_AUTHOR("Minghuan Lian <Minghuan.Lian@freescale.com>"); |
||||
MODULE_DESCRIPTION("Freescale Layerscape PCIe host controller driver"); |
||||
MODULE_LICENSE("GPL v2"); |
||||
Loading…
Reference in new issue