-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAlvIM0wACgkQONu9yGCS aT5bkRAAqvQaEuy5Cm0BNrn5/f3SIo5H9NcEipxNX8/5KMG2FKT982VkxW5NFDBa AiHuzSUSAwufpBJai5TS0VhyjzkhYucoKsmgiIC+Or5rGZGWIkf6yw9LJXwEs3Jl xtuhCjs23CqlBjivPFMmFeDN74eIoPcLxjagLjjvSPEusYM8MNXedf87MUd1CNa3 E07k/8CpD8RiDgQBi8ehjL19TSD4OhhhdPzQqEx1nGLsyiBrv4KsfOSOslZPUw0m Wv5X5JJnyk0+nUhtq2KJwkgTqz54IMJzmGvaMPGLrZq2ArwT6ac3Ru3rMYZaDido TTy4f3mHb25upZHJ2QjCeuKxFpQMJfvkObj/rB4fOQSu/7MERiKK4jINWRL/g1h8 g5tKOf16uR7c3ItjXHnracoc3hKSEr4KguvoLit+CQAslcaXSnyxdKmRuEy9Akar 5nK6GsbxzHnT55ZsgxYMaCIfy4J9K2E61qoggJ+Dif8Cm97CGMkzb2mxygvKLXiV ROQ8DWyDvOqUerYBVu06aRfXNZWsBPzyZFsgKUYTKzYelY0AaiFe69D19NazfTGC XiFWhSgTlgzhBgtTJByrcGAUBelORfQP+nzB2rtZ3qfacGaJUskRpZn/Ii96a2Cb RBVyxs5oarmsdhSqn/0rTXsnOGsz3kIfQFl/AlbzmeRzhD+rbxE= =Z+mk -----END PGP SIGNATURE----- Merge 4.14.77 into android-4.14-p Changes in 4.14.77 bnxt_en: Fix TX timeout during netpoll. bnxt_en: free hwrm resources, if driver probe fails. bonding: avoid possible dead-lock ip6_tunnel: be careful when accessing the inner header ip_tunnel: be careful when accessing the inner header ipv4: fix use-after-free in ip_cmsg_recv_dstaddr() ipv6: take rcu lock in rawv6_send_hdrinc() net: dsa: bcm_sf2: Call setup during switch resume net: hns: fix for unmapping problem when SMMU is on net: ipv4: update fnhe_pmtu when first hop's MTU changes net/ipv6: Display all addresses in output of /proc/net/if_inet6 netlabel: check for IPV4MASK in addrinfo_get net: mvpp2: Extract the correct ethtype from the skb for tx csum offload net: mvpp2: fix a txq_done race condition net: sched: Add policy validation for tc attributes net: systemport: Fix wake-up interrupt race during resume net/usb: cancel pending work when unbinding smsc75xx qlcnic: fix Tx descriptor corruption on 82xx devices qmi_wwan: Added support for Gemalto's Cinterion ALASxx WWAN interface rtnetlink: fix rtnl_fdb_dump() for ndmsg header rtnl: limit IFLA_NUM_TX_QUEUES and IFLA_NUM_RX_QUEUES to 4096 sctp: update dst pmtu with the correct daddr team: Forbid enslaving team device to itself tipc: fix flow control accounting for implicit connect udp: Unbreak modules that rely on external __skb_recv_udp() availability net: stmmac: Fixup the tail addr setting in xmit path net/packet: fix packet drop as of virtio gso net: dsa: bcm_sf2: Fix unbind ordering net/mlx5e: Set vlan masks for all offloaded TC rules net: aquantia: memory corruption on jumbo frames net/mlx5: E-Switch, Fix out of bound access when setting vport rate bonding: pass link-local packets to bonding master also. bonding: fix warning message nfp: avoid soft lockups under control message storm bnxt_en: don't try to offload VLAN 'modify' action net-ethtool: ETHTOOL_GUFO did not and should not require CAP_NET_ADMIN tcp/dccp: fix lockdep issue when SYN is backlogged inet: make sure to grab rcu_read_lock before using ireq->ireq_opt ASoC: rt5514: Fix the issue of the delay volume applied again ASoC: wm8804: Add ACPI support ASoC: sigmadsp: safeload should not have lower byte limit selftests/efivarfs: add required kernel configs selftests: memory-hotplug: add required configs ASoC: rsnd: adg: care clock-frequency size ASoC: rsnd: don't fallback to PIO mode when -EPROBE_DEFER Bluetooth: hci_ldisc: Free rw_semaphore on close mfd: omap-usb-host: Fix dts probe of children scsi: iscsi: target: Don't use stack buffer for scatterlist scsi: qla2xxx: Fix an endian bug in fcpcmd_is_corrupted() sound: enable interrupt after dma buffer initialization sound: don't call skl_init_chip() to reset intel skl soc hv_netvsc: fix schedule in RCU context stmmac: fix valid numbers of unicast filter entries net: macb: disable scatter-gather for macb on sama5d3 ARM: dts: at91: add new compatibility string for macb on sama5d3 PCI: hv: support reporting serial number as slot information clk: x86: add "ether_clk" alias for Bay Trail / Cherry Trail clk: x86: Stop marking clocks as CLK_IS_CRITICAL x86/kvm/lapic: always disable MMIO interface in x2APIC mode drm/amdgpu: Fix SDMA HQD destroy error on gfx_v7 mm/vmstat.c: fix outdated vmstat_text MIPS: VDSO: Always map near top of user memory mach64: detect the dot clock divider correctly on sparc percpu: stop leaking bitmap metadata blocks perf script python: Fix export-to-postgresql.py occasional failure perf script python: Fix export-to-sqlite.py sample columns s390/cio: Fix how vfio-ccw checks pinned pages dm cache: destroy migration_cache if cache target registration failed dm: fix report zone remapping to account for partition offset dm linear: eliminate linear_end_io call if CONFIG_DM_ZONED disabled dm linear: fix linear_end_io conditional definition cgroup: Fix dom_cgrp propagation when enabling threaded mode mmc: block: avoid multiblock reads for the last sector in SPI mode pinctrl: mcp23s08: fix irq and irqchip setup order arm64: perf: Reject stand-alone CHAIN events for PMUv3 mm/thp: fix call to mmu_notifier in set_pmd_migration_entry() v2 mm: Preserve _PAGE_DEVMAP across mprotect() calls i2c: i2c-scmi: fix for i2c_smbus_write_block_data xhci: Don't print a warning when setting link state for disabled ports mm: introduce NR_INDIRECTLY_RECLAIMABLE_BYTES mm: treat indirectly reclaimable memory as available in MemAvailable dcache: account external names as indirectly reclaimable memory mm: treat indirectly reclaimable memory as free in overcommit logic mm: don't show nr_indirectly_reclaimable in /proc/vmstat ARM: add more CPU part numbers for Cortex and Brahma B15 CPUs ARM: bugs: prepare processor bug infrastructure ARM: bugs: hook processor bug checking into SMP and suspend paths ARM: bugs: add support for per-processor bug checking ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre ARM: spectre-v2: harden branch predictor on context switches ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit ARM: spectre-v2: harden user aborts in kernel space ARM: spectre-v2: add firmware based hardening ARM: spectre-v2: warn about incorrect context switching functions ARM: KVM: invalidate BTB on guest exit for Cortex-A12/A17 ARM: KVM: invalidate icache on guest exit for Cortex-A15 ARM: spectre-v2: KVM: invalidate icache on guest exit for Brahma B15 ARM: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling ARM: KVM: report support for SMCCC_ARCH_WORKAROUND_1 ARM: spectre-v1: add speculation barrier (csdb) macros ARM: spectre-v1: add array_index_mask_nospec() implementation ARM: spectre-v1: fix syscall entry ARM: signal: copy registers using __copy_from_user() ARM: vfp: use __copy_from_user() when restoring VFP state ARM: oabi-compat: copy semops using __copy_from_user() ARM: use __inttype() in get_user() ARM: spectre-v1: use get_user() for __get_user() ARM: spectre-v1: mitigate user accesses perf tools: Fix snprint warnings for gcc 8 Linux 4.14.77 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>tirimbino
commit
c2214bce1a
@ -0,0 +1,18 @@ |
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// SPDX-Identifier: GPL-2.0
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#include <linux/init.h> |
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#include <asm/bugs.h> |
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#include <asm/proc-fns.h> |
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void check_other_bugs(void) |
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{ |
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#ifdef MULTI_CPU |
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if (processor.check_bugs) |
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processor.check_bugs(); |
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#endif |
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} |
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void __init check_bugs(void) |
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{ |
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check_writebuffer_bugs(); |
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check_other_bugs(); |
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} |
@ -0,0 +1,174 @@ |
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/arm-smccc.h> |
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#include <linux/kernel.h> |
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#include <linux/psci.h> |
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#include <linux/smp.h> |
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#include <asm/cp15.h> |
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#include <asm/cputype.h> |
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#include <asm/proc-fns.h> |
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#include <asm/system_misc.h> |
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#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR |
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DEFINE_PER_CPU(harden_branch_predictor_fn_t, harden_branch_predictor_fn); |
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extern void cpu_v7_iciallu_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); |
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extern void cpu_v7_bpiall_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); |
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extern void cpu_v7_smc_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); |
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extern void cpu_v7_hvc_switch_mm(phys_addr_t pgd_phys, struct mm_struct *mm); |
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static void harden_branch_predictor_bpiall(void) |
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{ |
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write_sysreg(0, BPIALL); |
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} |
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static void harden_branch_predictor_iciallu(void) |
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{ |
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write_sysreg(0, ICIALLU); |
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} |
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static void __maybe_unused call_smc_arch_workaround_1(void) |
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{ |
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arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); |
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} |
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static void __maybe_unused call_hvc_arch_workaround_1(void) |
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{ |
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arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL); |
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} |
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static void cpu_v7_spectre_init(void) |
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{ |
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const char *spectre_v2_method = NULL; |
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int cpu = smp_processor_id(); |
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if (per_cpu(harden_branch_predictor_fn, cpu)) |
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return; |
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switch (read_cpuid_part()) { |
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case ARM_CPU_PART_CORTEX_A8: |
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case ARM_CPU_PART_CORTEX_A9: |
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case ARM_CPU_PART_CORTEX_A12: |
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case ARM_CPU_PART_CORTEX_A17: |
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case ARM_CPU_PART_CORTEX_A73: |
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case ARM_CPU_PART_CORTEX_A75: |
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if (processor.switch_mm != cpu_v7_bpiall_switch_mm) |
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goto bl_error; |
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per_cpu(harden_branch_predictor_fn, cpu) = |
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harden_branch_predictor_bpiall; |
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spectre_v2_method = "BPIALL"; |
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break; |
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case ARM_CPU_PART_CORTEX_A15: |
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case ARM_CPU_PART_BRAHMA_B15: |
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if (processor.switch_mm != cpu_v7_iciallu_switch_mm) |
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goto bl_error; |
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per_cpu(harden_branch_predictor_fn, cpu) = |
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harden_branch_predictor_iciallu; |
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spectre_v2_method = "ICIALLU"; |
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break; |
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#ifdef CONFIG_ARM_PSCI |
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default: |
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/* Other ARM CPUs require no workaround */ |
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if (read_cpuid_implementor() == ARM_CPU_IMP_ARM) |
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break; |
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/* fallthrough */ |
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/* Cortex A57/A72 require firmware workaround */ |
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case ARM_CPU_PART_CORTEX_A57: |
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case ARM_CPU_PART_CORTEX_A72: { |
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struct arm_smccc_res res; |
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if (psci_ops.smccc_version == SMCCC_VERSION_1_0) |
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break; |
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switch (psci_ops.conduit) { |
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case PSCI_CONDUIT_HVC: |
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arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, |
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ARM_SMCCC_ARCH_WORKAROUND_1, &res); |
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if ((int)res.a0 != 0) |
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break; |
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if (processor.switch_mm != cpu_v7_hvc_switch_mm && cpu) |
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goto bl_error; |
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per_cpu(harden_branch_predictor_fn, cpu) = |
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call_hvc_arch_workaround_1; |
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processor.switch_mm = cpu_v7_hvc_switch_mm; |
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spectre_v2_method = "hypervisor"; |
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break; |
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case PSCI_CONDUIT_SMC: |
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arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, |
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ARM_SMCCC_ARCH_WORKAROUND_1, &res); |
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if ((int)res.a0 != 0) |
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break; |
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if (processor.switch_mm != cpu_v7_smc_switch_mm && cpu) |
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goto bl_error; |
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per_cpu(harden_branch_predictor_fn, cpu) = |
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call_smc_arch_workaround_1; |
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processor.switch_mm = cpu_v7_smc_switch_mm; |
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spectre_v2_method = "firmware"; |
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break; |
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default: |
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break; |
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} |
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} |
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#endif |
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} |
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if (spectre_v2_method) |
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pr_info("CPU%u: Spectre v2: using %s workaround\n", |
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smp_processor_id(), spectre_v2_method); |
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return; |
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bl_error: |
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pr_err("CPU%u: Spectre v2: incorrect context switching function, system vulnerable\n", |
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cpu); |
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} |
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#else |
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static void cpu_v7_spectre_init(void) |
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{ |
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} |
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#endif |
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static __maybe_unused bool cpu_v7_check_auxcr_set(bool *warned, |
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u32 mask, const char *msg) |
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{ |
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u32 aux_cr; |
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asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (aux_cr)); |
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if ((aux_cr & mask) != mask) { |
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if (!*warned) |
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pr_err("CPU%u: %s", smp_processor_id(), msg); |
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*warned = true; |
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return false; |
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} |
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return true; |
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} |
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static DEFINE_PER_CPU(bool, spectre_warned); |
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static bool check_spectre_auxcr(bool *warned, u32 bit) |
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{ |
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return IS_ENABLED(CONFIG_HARDEN_BRANCH_PREDICTOR) && |
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cpu_v7_check_auxcr_set(warned, bit, |
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"Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable\n"); |
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} |
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void cpu_v7_ca8_ibe(void) |
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{ |
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if (check_spectre_auxcr(this_cpu_ptr(&spectre_warned), BIT(6))) |
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cpu_v7_spectre_init(); |
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} |
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void cpu_v7_ca15_ibe(void) |
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{ |
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if (check_spectre_auxcr(this_cpu_ptr(&spectre_warned), BIT(0))) |
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cpu_v7_spectre_init(); |
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} |
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void cpu_v7_bugs_init(void) |
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{ |
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cpu_v7_spectre_init(); |
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} |
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Reference in new issue