From aad261f5bbab116680b31e10a735268685428adb Mon Sep 17 00:00:00 2001 From: Siddartha Mohanadoss Date: Fri, 10 Apr 2020 00:34:51 -0700 Subject: [PATCH] msm: mhi_dev: Update detecting BME during link enumeration During PCIe enumeration the device waits for the Bus Master Enable to be set by the host and currently polls for this bit to be set. The host driver could take longer to enable the Bus Master Enable and can cause the device to timeout when set to polling mode. Therefore rely on the Bus Master Enable interrupt that is triggered on the device after host set this bit. Change-Id: I15b106ca0bc06a75370d1e1b4a83e2d39af97fb8 Signed-off-by: Siddartha Mohanadoss --- drivers/platform/msm/ep_pcie/ep_pcie_core.c | 14 ++++---------- drivers/platform/msm/mhi_dev/mhi_sm.c | 4 ++-- 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index c97804904c1c..cb1670e52605 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -1915,16 +1915,10 @@ checkbme: ep_pcie_bar0_address = readl_relaxed(dev->dm_core + PCIE20_BAR0); } else { - if (!(opt & EP_PCIE_OPT_ENUM_ASYNC)) - EP_PCIE_ERR(dev, - "PCIe V%d: PCIe link is up but BME is still disabled after max waiting time\n", - dev->rev); - if (!ep_pcie_debug_keep_resource && - !(opt&EP_PCIE_OPT_ENUM_ASYNC)) { - ret = EP_PCIE_ERROR; - dev->link_status = EP_PCIE_LINK_DISABLED; - goto link_fail; - } + EP_PCIE_DBG(dev, + "PCIe V%d: PCIe link is up but BME is disabled; current SW link status:%d\n", + dev->rev, dev->link_status); + dev->link_status = EP_PCIE_LINK_UP; } dev->suspending = false; diff --git a/drivers/platform/msm/mhi_dev/mhi_sm.c b/drivers/platform/msm/mhi_dev/mhi_sm.c index 7147836b8e5f..e9c917fc3439 100644 --- a/drivers/platform/msm/mhi_dev/mhi_sm.c +++ b/drivers/platform/msm/mhi_dev/mhi_sm.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1014,7 +1014,7 @@ static void mhi_sm_pcie_event_manager(struct work_struct *work) spin_unlock_irqrestore(&mhi_sm_ctx->mhi_dev->lock, flags); res = ep_pcie_enable_endpoint(mhi_sm_ctx->mhi_dev->phandle, - EP_PCIE_OPT_ENUM); + EP_PCIE_OPT_ENUM | EP_PCIE_OPT_ENUM_ASYNC); if (res) { MHI_SM_ERR("ep-pcie failed to link train, return %d\n", res);