This adds power supply driver support for the Fuel-Gauge part of the DA9150 combined Charger and Fuel-Gauge device. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Acked-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>tirimbino
Adam Thomson
9 years ago
committed by
Lee Jones
parent
daaab94326
commit
a419b4fd91
@ -0,0 +1,579 @@ |
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/*
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* DA9150 Fuel-Gauge Driver |
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* |
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* Copyright (c) 2015 Dialog Semiconductor |
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* |
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* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/of.h> |
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#include <linux/of_platform.h> |
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#include <linux/slab.h> |
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#include <linux/interrupt.h> |
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#include <linux/delay.h> |
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#include <linux/power_supply.h> |
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#include <linux/list.h> |
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#include <asm/div64.h> |
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#include <linux/mfd/da9150/core.h> |
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#include <linux/mfd/da9150/registers.h> |
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/* Core2Wire */ |
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#define DA9150_QIF_READ (0x0 << 7) |
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#define DA9150_QIF_WRITE (0x1 << 7) |
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#define DA9150_QIF_CODE_MASK 0x7F |
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#define DA9150_QIF_BYTE_SIZE 8 |
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#define DA9150_QIF_BYTE_MASK 0xFF |
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#define DA9150_QIF_SHORT_SIZE 2 |
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#define DA9150_QIF_LONG_SIZE 4 |
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/* QIF Codes */ |
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#define DA9150_QIF_UAVG 6 |
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#define DA9150_QIF_UAVG_SIZE DA9150_QIF_LONG_SIZE |
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#define DA9150_QIF_IAVG 8 |
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#define DA9150_QIF_IAVG_SIZE DA9150_QIF_LONG_SIZE |
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#define DA9150_QIF_NTCAVG 12 |
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#define DA9150_QIF_NTCAVG_SIZE DA9150_QIF_LONG_SIZE |
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#define DA9150_QIF_SHUNT_VAL 36 |
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#define DA9150_QIF_SHUNT_VAL_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_SD_GAIN 38 |
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#define DA9150_QIF_SD_GAIN_SIZE DA9150_QIF_LONG_SIZE |
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#define DA9150_QIF_FCC_MAH 40 |
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#define DA9150_QIF_FCC_MAH_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_SOC_PCT 43 |
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#define DA9150_QIF_SOC_PCT_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_CHARGE_LIMIT 44 |
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#define DA9150_QIF_CHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_DISCHARGE_LIMIT 45 |
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#define DA9150_QIF_DISCHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_FW_MAIN_VER 118 |
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#define DA9150_QIF_FW_MAIN_VER_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_E_FG_STATUS 126 |
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#define DA9150_QIF_E_FG_STATUS_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_SYNC 127 |
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#define DA9150_QIF_SYNC_SIZE DA9150_QIF_SHORT_SIZE |
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#define DA9150_QIF_MAX_CODES 128 |
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/* QIF Sync Timeout */ |
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#define DA9150_QIF_SYNC_TIMEOUT 1000 |
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#define DA9150_QIF_SYNC_RETRIES 10 |
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/* QIF E_FG_STATUS */ |
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#define DA9150_FG_IRQ_LOW_SOC_MASK (1 << 0) |
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#define DA9150_FG_IRQ_HIGH_SOC_MASK (1 << 1) |
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#define DA9150_FG_IRQ_SOC_MASK \ |
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(DA9150_FG_IRQ_LOW_SOC_MASK | DA9150_FG_IRQ_HIGH_SOC_MASK) |
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/* Private data */ |
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struct da9150_fg { |
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struct da9150 *da9150; |
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struct device *dev; |
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struct mutex io_lock; |
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struct power_supply *battery; |
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struct delayed_work work; |
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u32 interval; |
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int warn_soc; |
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int crit_soc; |
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int soc; |
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}; |
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/* Battery Properties */ |
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static u32 da9150_fg_read_attr(struct da9150_fg *fg, u8 code, u8 size) |
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{ |
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u8 buf[size]; |
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u8 read_addr; |
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u32 res = 0; |
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int i; |
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/* Set QIF code (READ mode) */ |
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read_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_READ; |
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da9150_read_qif(fg->da9150, read_addr, size, buf); |
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for (i = 0; i < size; ++i) |
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res |= (buf[i] << (i * DA9150_QIF_BYTE_SIZE)); |
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return res; |
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} |
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static void da9150_fg_write_attr(struct da9150_fg *fg, u8 code, u8 size, |
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u32 val) |
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{ |
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u8 buf[size]; |
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u8 write_addr; |
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int i; |
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/* Set QIF code (WRITE mode) */ |
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write_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_WRITE; |
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for (i = 0; i < size; ++i) { |
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buf[i] = (val >> (i * DA9150_QIF_BYTE_SIZE)) & |
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DA9150_QIF_BYTE_MASK; |
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} |
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da9150_write_qif(fg->da9150, write_addr, size, buf); |
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} |
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/* Trigger QIF Sync to update QIF readable data */ |
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static void da9150_fg_read_sync_start(struct da9150_fg *fg) |
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{ |
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int i = 0; |
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u32 res = 0; |
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mutex_lock(&fg->io_lock); |
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/* Check if QIF sync already requested, and write to sync if not */ |
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res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE); |
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if (res > 0) |
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da9150_fg_write_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE, 0); |
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/* Wait for sync to complete */ |
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res = 0; |
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while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) { |
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usleep_range(DA9150_QIF_SYNC_TIMEOUT, |
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DA9150_QIF_SYNC_TIMEOUT * 2); |
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res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE); |
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} |
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/* Check if sync completed */ |
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if (res == 0) |
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dev_err(fg->dev, "Failed to perform QIF read sync!\n"); |
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} |
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/*
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* Should always be called after QIF sync read has been performed, and all |
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* attributes required have been accessed. |
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*/ |
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static inline void da9150_fg_read_sync_end(struct da9150_fg *fg) |
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{ |
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mutex_unlock(&fg->io_lock); |
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} |
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/* Sync read of single QIF attribute */ |
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static u32 da9150_fg_read_attr_sync(struct da9150_fg *fg, u8 code, u8 size) |
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{ |
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u32 val; |
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da9150_fg_read_sync_start(fg); |
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val = da9150_fg_read_attr(fg, code, size); |
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da9150_fg_read_sync_end(fg); |
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return val; |
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} |
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/* Wait for QIF Sync, write QIF data and wait for ack */ |
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static void da9150_fg_write_attr_sync(struct da9150_fg *fg, u8 code, u8 size, |
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u32 val) |
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{ |
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int i = 0; |
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u32 res = 0, sync_val; |
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mutex_lock(&fg->io_lock); |
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/* Check if QIF sync already requested */ |
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res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE); |
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/* Wait for an existing sync to complete */ |
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while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) { |
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usleep_range(DA9150_QIF_SYNC_TIMEOUT, |
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DA9150_QIF_SYNC_TIMEOUT * 2); |
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res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE); |
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} |
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if (res == 0) { |
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dev_err(fg->dev, "Timeout waiting for existing QIF sync!\n"); |
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mutex_unlock(&fg->io_lock); |
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return; |
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} |
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/* Write value for QIF code */ |
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da9150_fg_write_attr(fg, code, size, val); |
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/* Wait for write acknowledgment */ |
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i = 0; |
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sync_val = res; |
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while ((res == sync_val) && (i++ < DA9150_QIF_SYNC_RETRIES)) { |
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usleep_range(DA9150_QIF_SYNC_TIMEOUT, |
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DA9150_QIF_SYNC_TIMEOUT * 2); |
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res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC, |
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DA9150_QIF_SYNC_SIZE); |
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} |
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mutex_unlock(&fg->io_lock); |
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/* Check write was actually successful */ |
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if (res != (sync_val + 1)) |
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dev_err(fg->dev, "Error performing QIF sync write for code %d\n", |
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code); |
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} |
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/* Power Supply attributes */ |
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static int da9150_fg_capacity(struct da9150_fg *fg, |
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union power_supply_propval *val) |
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{ |
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val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT, |
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DA9150_QIF_SOC_PCT_SIZE); |
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if (val->intval > 100) |
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val->intval = 100; |
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return 0; |
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} |
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static int da9150_fg_current_avg(struct da9150_fg *fg, |
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union power_supply_propval *val) |
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{ |
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u32 iavg, sd_gain, shunt_val; |
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u64 div, res; |
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da9150_fg_read_sync_start(fg); |
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iavg = da9150_fg_read_attr(fg, DA9150_QIF_IAVG, |
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DA9150_QIF_IAVG_SIZE); |
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shunt_val = da9150_fg_read_attr(fg, DA9150_QIF_SHUNT_VAL, |
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DA9150_QIF_SHUNT_VAL_SIZE); |
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sd_gain = da9150_fg_read_attr(fg, DA9150_QIF_SD_GAIN, |
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DA9150_QIF_SD_GAIN_SIZE); |
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da9150_fg_read_sync_end(fg); |
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div = (u64) (sd_gain * shunt_val * 65536ULL); |
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do_div(div, 1000000); |
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res = (u64) (iavg * 1000000ULL); |
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do_div(res, div); |
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val->intval = (int) res; |
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return 0; |
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} |
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static int da9150_fg_voltage_avg(struct da9150_fg *fg, |
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union power_supply_propval *val) |
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{ |
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u64 res; |
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val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_UAVG, |
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DA9150_QIF_UAVG_SIZE); |
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res = (u64) (val->intval * 186ULL); |
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do_div(res, 10000); |
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val->intval = (int) res; |
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return 0; |
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} |
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static int da9150_fg_charge_full(struct da9150_fg *fg, |
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union power_supply_propval *val) |
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{ |
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val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_FCC_MAH, |
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DA9150_QIF_FCC_MAH_SIZE); |
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val->intval = val->intval * 1000; |
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return 0; |
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} |
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/*
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* Temperature reading from device is only valid if battery/system provides |
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* valid NTC to associated pin of DA9150 chip. |
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*/ |
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static int da9150_fg_temp(struct da9150_fg *fg, |
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union power_supply_propval *val) |
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{ |
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val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_NTCAVG, |
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DA9150_QIF_NTCAVG_SIZE); |
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val->intval = (val->intval * 10) / 1048576; |
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return 0; |
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} |
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static enum power_supply_property da9150_fg_props[] = { |
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POWER_SUPPLY_PROP_CAPACITY, |
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POWER_SUPPLY_PROP_CURRENT_AVG, |
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POWER_SUPPLY_PROP_VOLTAGE_AVG, |
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POWER_SUPPLY_PROP_CHARGE_FULL, |
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POWER_SUPPLY_PROP_TEMP, |
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}; |
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static int da9150_fg_get_prop(struct power_supply *psy, |
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enum power_supply_property psp, |
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union power_supply_propval *val) |
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{ |
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struct da9150_fg *fg = dev_get_drvdata(psy->dev.parent); |
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int ret; |
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switch (psp) { |
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case POWER_SUPPLY_PROP_CAPACITY: |
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ret = da9150_fg_capacity(fg, val); |
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break; |
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case POWER_SUPPLY_PROP_CURRENT_AVG: |
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ret = da9150_fg_current_avg(fg, val); |
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break; |
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case POWER_SUPPLY_PROP_VOLTAGE_AVG: |
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ret = da9150_fg_voltage_avg(fg, val); |
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break; |
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case POWER_SUPPLY_PROP_CHARGE_FULL: |
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ret = da9150_fg_charge_full(fg, val); |
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break; |
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case POWER_SUPPLY_PROP_TEMP: |
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ret = da9150_fg_temp(fg, val); |
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break; |
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default: |
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ret = -EINVAL; |
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break; |
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} |
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return ret; |
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} |
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/* Repeated SOC check */ |
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static bool da9150_fg_soc_changed(struct da9150_fg *fg) |
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{ |
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union power_supply_propval val; |
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da9150_fg_capacity(fg, &val); |
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if (val.intval != fg->soc) { |
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fg->soc = val.intval; |
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return true; |
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} |
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return false; |
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} |
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static void da9150_fg_work(struct work_struct *work) |
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{ |
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struct da9150_fg *fg = container_of(work, struct da9150_fg, work.work); |
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/* Report if SOC has changed */ |
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if (da9150_fg_soc_changed(fg)) |
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power_supply_changed(fg->battery); |
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schedule_delayed_work(&fg->work, msecs_to_jiffies(fg->interval)); |
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} |
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/* SOC level event configuration */ |
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static void da9150_fg_soc_event_config(struct da9150_fg *fg) |
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{ |
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int soc; |
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soc = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT, |
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DA9150_QIF_SOC_PCT_SIZE); |
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if (soc > fg->warn_soc) { |
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/* If SOC > warn level, set discharge warn level event */ |
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da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT, |
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DA9150_QIF_DISCHARGE_LIMIT_SIZE, |
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fg->warn_soc + 1); |
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} else if ((soc <= fg->warn_soc) && (soc > fg->crit_soc)) { |
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/*
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* If SOC <= warn level, set discharge crit level event, |
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* and set charge warn level event. |
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*/ |
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da9150_fg_write_attr_sync(fg, DA9150_QIF_DISCHARGE_LIMIT, |
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DA9150_QIF_DISCHARGE_LIMIT_SIZE, |
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fg->crit_soc + 1); |
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da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT, |
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DA9150_QIF_CHARGE_LIMIT_SIZE, |
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fg->warn_soc); |
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} else if (soc <= fg->crit_soc) { |
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/* If SOC <= crit level, set charge crit level event */ |
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da9150_fg_write_attr_sync(fg, DA9150_QIF_CHARGE_LIMIT, |
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DA9150_QIF_CHARGE_LIMIT_SIZE, |
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fg->crit_soc); |
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} |
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} |
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static irqreturn_t da9150_fg_irq(int irq, void *data) |
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{ |
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struct da9150_fg *fg = data; |
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u32 e_fg_status; |
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/* Read FG IRQ status info */ |
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e_fg_status = da9150_fg_read_attr(fg, DA9150_QIF_E_FG_STATUS, |
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DA9150_QIF_E_FG_STATUS_SIZE); |
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/* Handle warning/critical threhold events */ |
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if (e_fg_status & DA9150_FG_IRQ_SOC_MASK) |
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da9150_fg_soc_event_config(fg); |
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/* Clear any FG IRQs */ |
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da9150_fg_write_attr(fg, DA9150_QIF_E_FG_STATUS, |
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DA9150_QIF_E_FG_STATUS_SIZE, e_fg_status); |
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return IRQ_HANDLED; |
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} |
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static struct da9150_fg_pdata *da9150_fg_dt_pdata(struct device *dev) |
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{ |
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struct device_node *fg_node = dev->of_node; |
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struct da9150_fg_pdata *pdata; |
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pdata = devm_kzalloc(dev, sizeof(struct da9150_fg_pdata), GFP_KERNEL); |
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if (!pdata) |
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return NULL; |
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of_property_read_u32(fg_node, "dlg,update-interval", |
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&pdata->update_interval); |
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of_property_read_u8(fg_node, "dlg,warn-soc-level", |
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&pdata->warn_soc_lvl); |
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of_property_read_u8(fg_node, "dlg,crit-soc-level", |
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&pdata->crit_soc_lvl); |
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return pdata; |
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} |
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static const struct power_supply_desc fg_desc = { |
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.name = "da9150-fg", |
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.type = POWER_SUPPLY_TYPE_BATTERY, |
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.properties = da9150_fg_props, |
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.num_properties = ARRAY_SIZE(da9150_fg_props), |
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.get_property = da9150_fg_get_prop, |
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}; |
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static int da9150_fg_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct da9150 *da9150 = dev_get_drvdata(dev->parent); |
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struct da9150_fg_pdata *fg_pdata = dev_get_platdata(dev); |
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struct da9150_fg *fg; |
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int ver, irq, ret = 0; |
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fg = devm_kzalloc(dev, sizeof(*fg), GFP_KERNEL); |
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if (fg == NULL) |
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return -ENOMEM; |
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platform_set_drvdata(pdev, fg); |
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fg->da9150 = da9150; |
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fg->dev = dev; |
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mutex_init(&fg->io_lock); |
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/* Enable QIF */ |
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da9150_set_bits(da9150, DA9150_CORE2WIRE_CTRL_A, DA9150_FG_QIF_EN_MASK, |
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DA9150_FG_QIF_EN_MASK); |
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fg->battery = devm_power_supply_register(dev, &fg_desc, NULL); |
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if (IS_ERR(fg->battery)) { |
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ret = PTR_ERR(fg->battery); |
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return ret; |
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} |
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ver = da9150_fg_read_attr(fg, DA9150_QIF_FW_MAIN_VER, |
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DA9150_QIF_FW_MAIN_VER_SIZE); |
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dev_info(dev, "Version: 0x%x\n", ver); |
||||
|
||||
/* Handle DT data if provided */ |
||||
if (dev->of_node) { |
||||
fg_pdata = da9150_fg_dt_pdata(dev); |
||||
dev->platform_data = fg_pdata; |
||||
} |
||||
|
||||
/* Handle any pdata provided */ |
||||
if (fg_pdata) { |
||||
fg->interval = fg_pdata->update_interval; |
||||
|
||||
if (fg_pdata->warn_soc_lvl > 100) |
||||
dev_warn(dev, "Invalid SOC warning level provided, Ignoring"); |
||||
else |
||||
fg->warn_soc = fg_pdata->warn_soc_lvl; |
||||
|
||||
if ((fg_pdata->crit_soc_lvl > 100) || |
||||
(fg_pdata->crit_soc_lvl >= fg_pdata->warn_soc_lvl)) |
||||
dev_warn(dev, "Invalid SOC critical level provided, Ignoring"); |
||||
else |
||||
fg->crit_soc = fg_pdata->crit_soc_lvl; |
||||
|
||||
|
||||
} |
||||
|
||||
/* Configure initial SOC level events */ |
||||
da9150_fg_soc_event_config(fg); |
||||
|
||||
/*
|
||||
* If an interval period has been provided then setup repeating |
||||
* work for reporting data updates. |
||||
*/ |
||||
if (fg->interval) { |
||||
INIT_DELAYED_WORK(&fg->work, da9150_fg_work); |
||||
schedule_delayed_work(&fg->work, |
||||
msecs_to_jiffies(fg->interval)); |
||||
} |
||||
|
||||
/* Register IRQ */ |
||||
irq = platform_get_irq_byname(pdev, "FG"); |
||||
if (irq < 0) { |
||||
dev_err(dev, "Failed to get IRQ FG: %d\n", irq); |
||||
ret = irq; |
||||
goto irq_fail; |
||||
} |
||||
|
||||
ret = devm_request_threaded_irq(dev, irq, NULL, da9150_fg_irq, |
||||
IRQF_ONESHOT, "FG", fg); |
||||
if (ret) { |
||||
dev_err(dev, "Failed to request IRQ %d: %d\n", irq, ret); |
||||
goto irq_fail; |
||||
} |
||||
|
||||
return 0; |
||||
|
||||
irq_fail: |
||||
if (fg->interval) |
||||
cancel_delayed_work(&fg->work); |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
static int da9150_fg_remove(struct platform_device *pdev) |
||||
{ |
||||
struct da9150_fg *fg = platform_get_drvdata(pdev); |
||||
|
||||
if (fg->interval) |
||||
cancel_delayed_work(&fg->work); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int da9150_fg_resume(struct platform_device *pdev) |
||||
{ |
||||
struct da9150_fg *fg = platform_get_drvdata(pdev); |
||||
|
||||
/*
|
||||
* Trigger SOC check to happen now so as to indicate any value change |
||||
* since last check before suspend. |
||||
*/ |
||||
if (fg->interval) |
||||
flush_delayed_work(&fg->work); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static struct platform_driver da9150_fg_driver = { |
||||
.driver = { |
||||
.name = "da9150-fuel-gauge", |
||||
}, |
||||
.probe = da9150_fg_probe, |
||||
.remove = da9150_fg_remove, |
||||
.resume = da9150_fg_resume, |
||||
}; |
||||
|
||||
module_platform_driver(da9150_fg_driver); |
||||
|
||||
MODULE_DESCRIPTION("Fuel-Gauge Driver for DA9150"); |
||||
MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); |
||||
MODULE_LICENSE("GPL"); |
||||
Loading…
Reference in new issue