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ARM: dts: msm: Add initial device tree for sdm640

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Add initial device tree to support sdm640 on rumi, mtp, cdp and
qrd platforms.

Change-Id: Ie9d89013d91ecbd47c88e53a14846d4fb5b60715
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
tirimbino
Srinivas Ramana 7 years ago
parent 0ea8769e28
commit 8b750804c2
10 changed files with 781 additions and 0 deletions
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  1. 18
      arch/arm64/boot/dts/qcom/Makefile
  2. 22
      arch/arm64/boot/dts/qcom/sdm640-cdp.dts
  3. 14
      arch/arm64/boot/dts/qcom/sdm640-cdp.dtsi
  4. 22
      arch/arm64/boot/dts/qcom/sdm640-mtp.dts
  5. 14
      arch/arm64/boot/dts/qcom/sdm640-mtp.dtsi
  6. 22
      arch/arm64/boot/dts/qcom/sdm640-qrd.dts
  7. 14
      arch/arm64/boot/dts/qcom/sdm640-qrd.dtsi
  8. 23
      arch/arm64/boot/dts/qcom/sdm640-rumi.dts
  9. 25
      arch/arm64/boot/dts/qcom/sdm640-rumi.dtsi
  10. 607
      arch/arm64/boot/dts/qcom/sdm640.dtsi

18
arch/arm64/boot/dts/qcom/Makefile
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@ -45,6 +45,24 @@ dtb-$(CONFIG_ARCH_SDMSHRIKE) += sdmshrike-rumi.dtb \
sdmshrike-mtp.dtb \
sdmshrike-cdp.dtb
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
dtbo-$(CONFIG_ARCH_SDM640) += \
sdm640-cdp-overlay.dtbo \
sdm640-mtp-overlay.dtbo \
sdm640-rumi-overlay.dtbo \
sdm640-qrd-overlay.dtbo \
sdm640-cdp-overlay.dtbo-base := sdm640.dtb
sdm640-mtp-overlay.dtbo-base := sdm640.dtb
sdm640-rumi-overlay.dtbo-base := sdm640.dtb
sdm640-qrd-overlay.dtbo-base := sdm640.dtb
else
dtb-$(CONFIG_ARCH_SDM640) += sdm640-rumi.dtb \
sdm640-mtp.dtb \
sdm640-cdp.dtb \
sdm640-qrd.dtb
endif
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

22
arch/arm64/boot/dts/qcom/sdm640-cdp.dts
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@ -0,0 +1,22 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sdm640.dtsi"
#include "sdm640-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM640 CDP";
compatible = "qcom,sdm640-cdp", "qcom,sdm640", "qcom,cdp";
qcom,board-id = <1 0>;
};

14
arch/arm64/boot/dts/qcom/sdm640-cdp.dtsi
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@ -0,0 +1,14 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
};

22
arch/arm64/boot/dts/qcom/sdm640-mtp.dts
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@ -0,0 +1,22 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sdm640.dtsi"
#include "sdm640-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM640 MTP";
compatible = "qcom,sdm640-mtp", "qcom,sdm640", "qcom,mtp";
qcom,board-id = <8 0>;
};

14
arch/arm64/boot/dts/qcom/sdm640-mtp.dtsi
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@ -0,0 +1,14 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
};

22
arch/arm64/boot/dts/qcom/sdm640-qrd.dts
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@ -0,0 +1,22 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "sdm640.dtsi"
#include "sdm640-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM640 QRD";
compatible = "qcom,sdm640-qrd", "qcom,sdm640", "qcom,qrd";
qcom,board-id = <11 0>;
};

14
arch/arm64/boot/dts/qcom/sdm640-qrd.dtsi
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@ -0,0 +1,14 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
};

23
arch/arm64/boot/dts/qcom/sdm640-rumi.dts
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@ -0,0 +1,23 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/memreserve/ 0x90000000 0x00000100;
#include "sdm640.dtsi"
#include "sdm640-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM640 RUMI";
compatible = "qcom,sdm640-rumi", "qcom,sdm640", "qcom,rumi";
qcom,board-id = <15 0>;
};

25
arch/arm64/boot/dts/qcom/sdm640-rumi.dtsi
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@ -0,0 +1,25 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
timer {
clock-frequency = <5500000>;
};
timer@0x17c00000 {
clock-frequency = <1000000>;
};
wdog: qcom,wdt@17c10000{
status = "disabled";
};
};

607
arch/arm64/boot/dts/qcom/sdm640.dtsi
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@ -0,0 +1,607 @@
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "skeleton64.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Qualcomm Technologies, Inc. SDM640";
compatible = "qcom,sdm640";
qcom,msm-id = <355 0x0>;
interrupt-parent = <&intc>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
CPU0: cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
L3_0: l3-cache {
compatible = "arm,arch-cache";
cache-size = <0x100000>;
cache-level = <3>;
};
};
L1_I_0: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_0: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_0: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU1: cpu@100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_1: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_1: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_1: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU2: cpu@200 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x200>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_2: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_2: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_2: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU3: cpu@300 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x300>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_3: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_3: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_3: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU4: cpu@400 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x400>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_4>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_4: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_4: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_4: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU5: cpu@500 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x500>;
enable-method = "psci";
cache-size = <0x8000>;
next-level-cache = <&L2_5>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x20000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_5: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_D_5: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0xa000>;
};
L1_TLB_5: l1-tlb {
qcom,dump-size = <0x3000>;
};
};
CPU6: cpu@600 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x600>;
enable-method = "psci";
cache-size = <0x10000>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_100: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
};
L1_D_100: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
};
L1_TLB_100: l1-tlb {
qcom,dump-size = <0x3c00>;
};
};
CPU7: cpu@700 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x700>;
enable-method = "psci";
cache-size = <0x10000>;
next-level-cache = <&L2_7>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-size = <0x40000>;
cache-level = <2>;
next-level-cache = <&L3_0>;
};
L1_I_200: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
};
L1_D_200: l1-dcache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x14000>;
};
L1_TLB_200: l1-tlb {
qcom,dump-size = <0x3c00>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
core4 {
cpu = <&CPU4>;
};
core5 {
cpu = <&CPU5>;
};
};
cluster1 {
core6 {
cpu = <&CPU6>;
};
core7 {
cpu = <&CPU7>;
};
};
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
chosen {
bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
};
soc: soc { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
interrupt-controller;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x20000>;
reg = <0x17a00000 0x10000>, /* GICD */
<0x17a60000 0x100000>; /* GICR * 8 */
interrupts = <1 9 4>;
interrupt-parent = <&intc>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 1 0xf08>,
<1 2 0xf08>,
<1 3 0xf08>,
<1 0 0xf08>;
clock-frequency = <19200000>;
};
timer@0x17c20000{
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "arm,armv7-timer-mem";
reg = <0x17c20000 0x1000>;
clock-frequency = <19200000>;
frame@0x17c21000 {
frame-number = <0>;
interrupts = <0 8 0x4>,
<0 6 0x4>;
reg = <0x17c21000 0x1000>,
<0x17c22000 0x1000>;
};
frame@17c23000 {
frame-number = <1>;
interrupts = <0 9 0x4>;
reg = <0x17c23000 0x1000>;
status = "disabled";
};
frame@17c25000 {
frame-number = <2>;
interrupts = <0 10 0x4>;
reg = <0x17c25000 0x1000>;
status = "disabled";
};
frame@17c27000 {
frame-number = <3>;
interrupts = <0 11 0x4>;
reg = <0x17c27000 0x1000>;
status = "disabled";
};
frame@17c29000 {
frame-number = <4>;
interrupts = <0 12 0x4>;
reg = <0x17c29000 0x1000>;
status = "disabled";
};
frame@17c2b000 {
frame-number = <5>;
interrupts = <0 13 0x4>;
reg = <0x17c2b000 0x1000>;
status = "disabled";
};
frame@17c2d000 {
frame-number = <6>;
interrupts = <0 14 0x4>;
reg = <0x17c2d000 0x1000>;
status = "disabled";
};
};
cpu_pmu: cpu-pmu {
compatible = "arm,armv8-pmuv3";
qcom,irq-is-percpu;
interrupts = <1 5 4>;
};
qcom,msm-imem@146bf000 {
compatible = "qcom,msm-imem";
reg = <0x146bf000 0x1000>;
ranges = <0x0 0x146bf000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
mem_dump_table@10 {
compatible = "qcom,msm-imem-mem_dump_table";
reg = <0x10 8>;
};
restart_reason@65c {
compatible = "qcom,msm-imem-restart_reason";
reg = <0x65c 4>;
};
boot_stats@6b0 {
compatible = "qcom,msm-imem-boot_stats";
reg = <0x6b0 32>;
};
kaslr_offset@6d0 {
compatible = "qcom,msm-imem-kaslr_offset";
reg = <0x6d0 12>;
};
pil@94c {
compatible = "qcom,msm-imem-pil";
reg = <0x94c 200>;
};
};
restart@c264000 {
compatible = "qcom,pshold";
reg = <0xc264000 0x4>,
<0x1fd3000 0x4>;
reg-names = "pshold-base", "tcsr-boot-misc-detect";
};
qcom,msm-rtb {
compatible = "qcom,msm-rtb";
qcom,rtb-size = <0x100000>;
};
wdog: qcom,wdt@17c10000{
compatible = "qcom,msm-watchdog";
reg = <0x17c10000 0x1000>;
reg-names = "wdt-base";
interrupts = <0 0 0>, <0 1 0>;
qcom,bark-time = <11000>;
qcom,pet-time = <9360>;
qcom,ipi-ping;
qcom,wakeup-enable;
};
kryo-erp {
compatible = "arm,arm64-kryo-cpu-erp";
interrupts = <1 6 4>,
<1 7 4>,
<0 34 4>,
<0 35 4>;
interrupt-names = "l1-l2-faultirq",
"l1-l2-errirq",
"l3-scu-errirq",
"l3-scu-faultirq";
};
qcom,ghd {
compatible = "qcom,gladiator-hang-detect-v3";
qcom,threshold-arr = <0x17e0041C>;
qcom,config-reg = <0x17e00434>;
};
cpuss_dump {
compatible = "qcom,cpuss-dump";
qcom,l1_i_cache0 {
qcom,dump-node = <&L1_I_0>;
qcom,dump-id = <0x60>;
};
qcom,l1_i_cache1 {
qcom,dump-node = <&L1_I_1>;
qcom,dump-id = <0x61>;
};
qcom,l1_i_cache2 {
qcom,dump-node = <&L1_I_2>;
qcom,dump-id = <0x62>;
};
qcom,l1_i_cache3 {
qcom,dump-node = <&L1_I_3>;
qcom,dump-id = <0x63>;
};
qcom,l1_i_cache4 {
qcom,dump-node = <&L1_I_4>;
qcom,dump-id = <0x64>;
};
qcom,l1_i_cache5 {
qcom,dump-node = <&L1_I_5>;
qcom,dump-id = <0x65>;
};
qcom,l1_i_cache100 {
qcom,dump-node = <&L1_I_100>;
qcom,dump-id = <0x66>;
};
qcom,l1_i_cache200 {
qcom,dump-node = <&L1_I_200>;
qcom,dump-id = <0x67>;
};
qcom,l1_d_cache0 {
qcom,dump-node = <&L1_D_0>;
qcom,dump-id = <0x80>;
};
qcom,l1_d_cache1 {
qcom,dump-node = <&L1_D_1>;
qcom,dump-id = <0x81>;
};
qcom,l1_d_cache2 {
qcom,dump-node = <&L1_D_2>;
qcom,dump-id = <0x82>;
};
qcom,l1_d_cache3 {
qcom,dump-node = <&L1_D_3>;
qcom,dump-id = <0x83>;
};
qcom,l1_d_cache4 {
qcom,dump-node = <&L1_D_4>;
qcom,dump-id = <0x84>;
};
qcom,l1_d_cache5 {
qcom,dump-node = <&L1_D_5>;
qcom,dump-id = <0x85>;
};
qcom,l1_d_cache100 {
qcom,dump-node = <&L1_D_100>;
qcom,dump-id = <0x86>;
};
qcom,l1_d_cache200 {
qcom,dump-node = <&L1_D_200>;
qcom,dump-id = <0x87>;
};
qcom,l1_tlb_dump0 {
qcom,dump-node = <&L1_TLB_0>;
qcom,dump-id = <0x20>;
};
qcom,l1_tlb_dump1 {
qcom,dump-node = <&L1_TLB_1>;
qcom,dump-id = <0x21>;
};
qcom,l1_tlb_dump2 {
qcom,dump-node = <&L1_TLB_2>;
qcom,dump-id = <0x22>;
};
qcom,l1_tlb_dump3 {
qcom,dump-node = <&L1_TLB_3>;
qcom,dump-id = <0x23>;
};
qcom,l1_tlb_dump4 {
qcom,dump-node = <&L1_TLB_4>;
qcom,dump-id = <0x24>;
};
qcom,l1_tlb_dump5 {
qcom,dump-node = <&L1_TLB_5>;
qcom,dump-id = <0x25>;
};
qcom,l1_tlb_dump100 {
qcom,dump-node = <&L1_TLB_100>;
qcom,dump-id = <0x26>;
};
qcom,l1_tlb_dump200 {
qcom,dump-node = <&L1_TLB_200>;
qcom,dump-id = <0x27>;
};
};
};
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