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@ -779,7 +779,6 @@ int rv770_mc_init(struct radeon_device *rdev) |
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fixed20_12 a; |
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u32 tmp; |
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int chansize, numchan; |
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int r; |
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/* Get VRAM informations */ |
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rdev->mc.vram_is_ddr = true; |
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@ -822,9 +821,6 @@ int rv770_mc_init(struct radeon_device *rdev) |
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rdev->mc.real_vram_size = rdev->mc.aper_size; |
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if (rdev->flags & RADEON_IS_AGP) { |
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r = radeon_agp_init(rdev); |
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if (r) |
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return r; |
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/* gtt_size is setup by radeon_agp_init */ |
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rdev->mc.gtt_location = rdev->mc.agp_base; |
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tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; |
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@ -975,10 +971,12 @@ int rv770_suspend(struct radeon_device *rdev) |
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r600_wb_disable(rdev); |
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rv770_pcie_gart_disable(rdev); |
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/* unpin shaders bo */ |
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r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
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if (likely(r == 0)) { |
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radeon_bo_unpin(rdev->r600_blit.shader_obj); |
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radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
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if (rdev->r600_blit.shader_obj) { |
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r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
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if (likely(r == 0)) { |
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radeon_bo_unpin(rdev->r600_blit.shader_obj); |
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radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
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} |
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} |
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return 0; |
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} |
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@ -1037,6 +1035,11 @@ int rv770_init(struct radeon_device *rdev) |
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r = radeon_fence_driver_init(rdev); |
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if (r) |
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return r; |
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if (rdev->flags & RADEON_IS_AGP) { |
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r = radeon_agp_init(rdev); |
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if (r) |
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radeon_agp_disable(rdev); |
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} |
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r = rv770_mc_init(rdev); |
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if (r) |
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return r; |
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