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sh-pfc: sh7757: Remove unused input_pu range

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The PFC SH7757 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.

If required, configuring pull-up resistors for the SH7757 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
tirimbino
Laurent Pinchart 12 years ago
parent c5361517bb
commit 5f86072afb
1 changed files with 129 additions and 170 deletions
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  1. 299
      drivers/pinctrl/sh-pfc/pfc-sh7757.c

299
drivers/pinctrl/sh-pfc/pfc-sh7757.c
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@ -132,46 +132,6 @@ enum {
PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
PINMUX_INPUT_END,
PINMUX_INPUT_PULLUP_BEGIN,
PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
PTG7_IN_PU, PTG6_IN_PU, PTG4_IN_PU,
PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
PTI7_IN_PU, PTI6_IN_PU, PTI4_IN_PU,
PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
PTN4_IN_PU,
PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
PTV3_IN_PU, PTV2_IN_PU,
PTW1_IN_PU, PTW0_IN_PU,
PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
PINMUX_INPUT_PULLUP_END,
PINMUX_OUTPUT_BEGIN,
PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
@ -1728,14 +1688,14 @@ static const struct pinmux_func pinmux_func_gpios[] = {
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
{ PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
PTA7_FN, PTA7_OUT, PTA7_IN, 0,
PTA6_FN, PTA6_OUT, PTA6_IN, 0,
PTA5_FN, PTA5_OUT, PTA5_IN, 0,
PTA4_FN, PTA4_OUT, PTA4_IN, 0,
PTA3_FN, PTA3_OUT, PTA3_IN, 0,
PTA2_FN, PTA2_OUT, PTA2_IN, 0,
PTA1_FN, PTA1_OUT, PTA1_IN, 0,
PTA0_FN, PTA0_OUT, PTA0_IN, 0 }
},
{ PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
PTB7_FN, PTB7_OUT, PTB7_IN, 0,
@ -1758,100 +1718,100 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
},
{ PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
PTD7_FN, PTD7_OUT, PTD7_IN, 0,
PTD6_FN, PTD6_OUT, PTD6_IN, 0,
PTD5_FN, PTD5_OUT, PTD5_IN, 0,
PTD4_FN, PTD4_OUT, PTD4_IN, 0,
PTD3_FN, PTD3_OUT, PTD3_IN, 0,
PTD2_FN, PTD2_OUT, PTD2_IN, 0,
PTD1_FN, PTD1_OUT, PTD1_IN, 0,
PTD0_FN, PTD0_OUT, PTD0_IN, 0 }
},
{ PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
PTE7_FN, PTE7_OUT, PTE7_IN, 0,
PTE6_FN, PTE6_OUT, PTE6_IN, 0,
PTE5_FN, PTE5_OUT, PTE5_IN, 0,
PTE4_FN, PTE4_OUT, PTE4_IN, 0,
PTE3_FN, PTE3_OUT, PTE3_IN, 0,
PTE2_FN, PTE2_OUT, PTE2_IN, 0,
PTE1_FN, PTE1_OUT, PTE1_IN, 0,
PTE0_FN, PTE0_OUT, PTE0_IN, 0 }
},
{ PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
PTF7_FN, PTF7_OUT, PTF7_IN, 0,
PTF6_FN, PTF6_OUT, PTF6_IN, 0,
PTF5_FN, PTF5_OUT, PTF5_IN, 0,
PTF4_FN, PTF4_OUT, PTF4_IN, 0,
PTF3_FN, PTF3_OUT, PTF3_IN, 0,
PTF2_FN, PTF2_OUT, PTF2_IN, 0,
PTF1_FN, PTF1_OUT, PTF1_IN, 0,
PTF0_FN, PTF0_OUT, PTF0_IN, 0 }
},
{ PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
PTG7_FN, PTG7_OUT, PTG7_IN, 0,
PTG6_FN, PTG6_OUT, PTG6_IN, 0,
PTG5_FN, PTG5_OUT, PTG5_IN, 0,
PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
PTG4_FN, PTG4_OUT, PTG4_IN, 0,
PTG3_FN, PTG3_OUT, PTG3_IN, 0,
PTG2_FN, PTG2_OUT, PTG2_IN, 0,
PTG1_FN, PTG1_OUT, PTG1_IN, 0,
PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
},
{ PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
PTH7_FN, PTH7_OUT, PTH7_IN, 0,
PTH6_FN, PTH6_OUT, PTH6_IN, 0,
PTH5_FN, PTH5_OUT, PTH5_IN, 0,
PTH4_FN, PTH4_OUT, PTH4_IN, 0,
PTH3_FN, PTH3_OUT, PTH3_IN, 0,
PTH2_FN, PTH2_OUT, PTH2_IN, 0,
PTH1_FN, PTH1_OUT, PTH1_IN, 0,
PTH0_FN, PTH0_OUT, PTH0_IN, 0 }
},
{ PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
PTI7_FN, PTI7_OUT, PTI7_IN, 0,
PTI6_FN, PTI6_OUT, PTI6_IN, 0,
PTI5_FN, PTI5_OUT, PTI5_IN, 0,
PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
PTI4_FN, PTI4_OUT, PTI4_IN, 0,
PTI3_FN, PTI3_OUT, PTI3_IN, 0,
PTI2_FN, PTI2_OUT, PTI2_IN, 0,
PTI1_FN, PTI1_OUT, PTI1_IN, 0,
PTI0_FN, PTI0_OUT, PTI0_IN, 0 }
},
{ PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
0, 0, 0, 0, /* reserved: always set 1 */
PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0,
PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0,
PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0,
PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0,
PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0,
PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0,
PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 }
},
{ PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
PTK7_FN, PTK7_OUT, PTK7_IN, 0,
PTK6_FN, PTK6_OUT, PTK6_IN, 0,
PTK5_FN, PTK5_OUT, PTK5_IN, 0,
PTK4_FN, PTK4_OUT, PTK4_IN, 0,
PTK3_FN, PTK3_OUT, PTK3_IN, 0,
PTK2_FN, PTK2_OUT, PTK2_IN, 0,
PTK1_FN, PTK1_OUT, PTK1_IN, 0,
PTK0_FN, PTK0_OUT, PTK0_IN, 0 }
},
{ PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
0, 0, 0, 0, /* reserved: always set 1 */
PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
PTL6_FN, PTL6_OUT, PTL6_IN, 0,
PTL5_FN, PTL5_OUT, PTL5_IN, 0,
PTL4_FN, PTL4_OUT, PTL4_IN, 0,
PTL3_FN, PTL3_OUT, PTL3_IN, 0,
PTL2_FN, PTL2_OUT, PTL2_IN, 0,
PTL1_FN, PTL1_OUT, PTL1_IN, 0,
PTL0_FN, PTL0_OUT, PTL0_IN, 0 }
},
{ PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
PTM7_FN, PTM7_OUT, PTM7_IN, 0,
PTM6_FN, PTM6_OUT, PTM6_IN, 0,
PTM5_FN, PTM5_OUT, PTM5_IN, 0,
PTM4_FN, PTM4_OUT, PTM4_IN, 0,
PTM3_FN, PTM3_OUT, PTM3_IN, 0,
PTM2_FN, PTM2_OUT, PTM2_IN, 0,
PTM1_FN, PTM1_OUT, PTM1_IN, 0,
@ -1861,21 +1821,21 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
0, 0, 0, 0, /* reserved: always set 1 */
PTN6_FN, PTN6_OUT, PTN6_IN, 0,
PTN5_FN, PTN5_OUT, PTN5_IN, 0,
PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
PTN4_FN, PTN4_OUT, PTN4_IN, 0,
PTN3_FN, PTN3_OUT, PTN3_IN, 0,
PTN2_FN, PTN2_OUT, PTN2_IN, 0,
PTN1_FN, PTN1_OUT, PTN1_IN, 0,
PTN0_FN, PTN0_OUT, PTN0_IN, 0 }
},
{ PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
PTO7_FN, PTO7_OUT, PTO7_IN, 0,
PTO6_FN, PTO6_OUT, PTO6_IN, 0,
PTO5_FN, PTO5_OUT, PTO5_IN, 0,
PTO4_FN, PTO4_OUT, PTO4_IN, 0,
PTO3_FN, PTO3_OUT, PTO3_IN, 0,
PTO2_FN, PTO2_OUT, PTO2_IN, 0,
PTO1_FN, PTO1_OUT, PTO1_IN, 0,
PTO0_FN, PTO0_OUT, PTO0_IN, 0 }
},
#if 0 /* FIXME: Remove it? */
{ PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
@ -1920,32 +1880,32 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
},
{ PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
PTT7_FN, PTT7_OUT, PTT7_IN, 0,
PTT6_FN, PTT6_OUT, PTT6_IN, 0,
PTT5_FN, PTT5_OUT, PTT5_IN, 0,
PTT4_FN, PTT4_OUT, PTT4_IN, 0,
PTT3_FN, PTT3_OUT, PTT3_IN, 0,
PTT2_FN, PTT2_OUT, PTT2_IN, 0,
PTT1_FN, PTT1_OUT, PTT1_IN, 0,
PTT0_FN, PTT0_OUT, PTT0_IN, 0 }
},
{ PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
PTU7_FN, PTU7_OUT, PTU7_IN, 0,
PTU6_FN, PTU6_OUT, PTU6_IN, 0,
PTU5_FN, PTU5_OUT, PTU5_IN, 0,
PTU4_FN, PTU4_OUT, PTU4_IN, 0,
PTU3_FN, PTU3_OUT, PTU3_IN, 0,
PTU2_FN, PTU2_OUT, PTU2_IN, 0,
PTU1_FN, PTU1_OUT, PTU1_IN, 0,
PTU0_FN, PTU0_OUT, PTU0_IN, 0 }
},
{ PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
PTV7_FN, PTV7_OUT, PTV7_IN, 0,
PTV6_FN, PTV6_OUT, PTV6_IN, 0,
PTV5_FN, PTV5_OUT, PTV5_IN, 0,
PTV4_FN, PTV4_OUT, PTV4_IN, 0,
PTV3_FN, PTV3_OUT, PTV3_IN, 0,
PTV2_FN, PTV2_OUT, PTV2_IN, 0,
PTV1_FN, PTV1_OUT, PTV1_IN, 0,
PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
},
@ -1956,28 +1916,28 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
PTW4_FN, PTW4_OUT, PTW4_IN, 0,
PTW3_FN, PTW3_OUT, PTW3_IN, 0,
PTW2_FN, PTW2_OUT, PTW2_IN, 0,
PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
PTW1_FN, PTW1_OUT, PTW1_IN, 0,
PTW0_FN, PTW0_OUT, PTW0_IN, 0 }
},
{ PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
PTX7_FN, PTX7_OUT, PTX7_IN, 0,
PTX6_FN, PTX6_OUT, PTX6_IN, 0,
PTX5_FN, PTX5_OUT, PTX5_IN, 0,
PTX4_FN, PTX4_OUT, PTX4_IN, 0,
PTX3_FN, PTX3_OUT, PTX3_IN, 0,
PTX2_FN, PTX2_OUT, PTX2_IN, 0,
PTX1_FN, PTX1_OUT, PTX1_IN, 0,
PTX0_FN, PTX0_OUT, PTX0_IN, 0 }
},
{ PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
PTY7_FN, PTY7_OUT, PTY7_IN, 0,
PTY6_FN, PTY6_OUT, PTY6_IN, 0,
PTY5_FN, PTY5_OUT, PTY5_IN, 0,
PTY4_FN, PTY4_OUT, PTY4_IN, 0,
PTY3_FN, PTY3_OUT, PTY3_IN, 0,
PTY2_FN, PTY2_OUT, PTY2_IN, 0,
PTY1_FN, PTY1_OUT, PTY1_IN, 0,
PTY0_FN, PTY0_OUT, PTY0_IN, 0 }
},
{ PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
@ -2267,7 +2227,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
const struct sh_pfc_soc_info sh7757_pinmux_info = {
.name = "sh7757_pfc",
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },

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