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@ -1319,6 +1319,8 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev) |
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if (pi->enable_dpm) |
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sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); |
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rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; |
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return 0; |
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} |
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@ -1830,3 +1832,45 @@ u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low) |
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return pi->sys_info.bootup_uma_clk; |
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} |
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int sumo_dpm_force_performance_level(struct radeon_device *rdev, |
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enum radeon_dpm_forced_level level) |
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{ |
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struct sumo_power_info *pi = sumo_get_pi(rdev); |
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struct radeon_ps *rps = &pi->current_rps; |
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struct sumo_ps *ps = sumo_get_ps(rps); |
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int i; |
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if (ps->num_levels <= 1) |
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return 0; |
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if (level == RADEON_DPM_FORCED_LEVEL_HIGH) { |
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sumo_power_level_enable(rdev, ps->num_levels - 1, true); |
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sumo_set_forced_level(rdev, ps->num_levels - 1); |
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sumo_set_forced_mode_enabled(rdev); |
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for (i = 0; i < ps->num_levels - 1; i++) { |
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sumo_power_level_enable(rdev, i, false); |
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} |
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sumo_set_forced_mode(rdev, false); |
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sumo_set_forced_mode_enabled(rdev); |
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sumo_set_forced_mode(rdev, false); |
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} else if (level == RADEON_DPM_FORCED_LEVEL_LOW) { |
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sumo_power_level_enable(rdev, 0, true); |
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sumo_set_forced_level(rdev, 0); |
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sumo_set_forced_mode_enabled(rdev); |
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for (i = 1; i < ps->num_levels; i++) { |
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sumo_power_level_enable(rdev, i, false); |
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} |
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sumo_set_forced_mode(rdev, false); |
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sumo_set_forced_mode_enabled(rdev); |
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sumo_set_forced_mode(rdev, false); |
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} else { |
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for (i = 0; i < ps->num_levels; i++) { |
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sumo_power_level_enable(rdev, i, true); |
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} |
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} |
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rdev->pm.dpm.forced_level = level; |
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return 0; |
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} |
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