This commit adds the setup code for booting Linux on AmigaOne G3SE (G3 only), AmigaOne XE and uA1 (G3/G4) desktop computers. These boards were sold by Eyetech and are based on MAI Logic's Teron boards and its Articia S northbridge. The AmigaOne uses U-boot as firmware, which doesn't support a flattened device tree yet. The northbridge has some design flaws, which makes it necessary to use non cacheable memory for DMA operations (CONFIG_NOT_COHERENT_CACHE) and to avoid setting the coherence (M) flag for memory pages. Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>tirimbino
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config AMIGAONE |
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bool "Eyetech AmigaOne/MAI Teron" |
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depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM |
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select PPC_I8259 |
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select PPC_INDIRECT_PCI |
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select PPC_UDBG_16550 |
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select PCI |
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select NOT_COHERENT_CACHE |
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select CHECK_CACHE_COHERENCY |
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select DEFAULT_UIMAGE |
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select PCSPKR_PLATFORM |
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help |
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Select AmigaOne for the following machines: |
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- AmigaOne SE/Teron CX (G3 only) |
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- AmigaOne XE/Teron PX |
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- uA1/Teron mini |
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More information is available at: |
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<http://amigaone-linux.sourceforge.net/>. |
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obj-y += setup.o
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/*
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* AmigaOne platform setup |
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* |
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* Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) |
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* |
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* Based on original amigaone_setup.c source code |
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* Copyright 2003 by Hans-Joerg Frieden and Thomas Frieden |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/seq_file.h> |
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#include <linux/utsrelease.h> |
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#include <asm/machdep.h> |
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#include <asm/cputable.h> |
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#include <asm/prom.h> |
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#include <asm/pci-bridge.h> |
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#include <asm/i8259.h> |
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#include <asm/time.h> |
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#include <asm/udbg.h> |
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extern void __flush_disable_L1(void); |
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void amigaone_show_cpuinfo(struct seq_file *m) |
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{ |
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seq_printf(m, "vendor\t\t: Eyetech Ltd.\n"); |
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} |
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static int __init amigaone_add_bridge(struct device_node *dev) |
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{ |
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const u32 *cfg_addr, *cfg_data; |
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int len; |
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const int *bus_range; |
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struct pci_controller *hose; |
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printk(KERN_INFO "Adding PCI host bridge %s\n", dev->full_name); |
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cfg_addr = of_get_address(dev, 0, NULL, NULL); |
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cfg_data = of_get_address(dev, 1, NULL, NULL); |
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if ((cfg_addr == NULL) || (cfg_data == NULL)) |
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return -ENODEV; |
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bus_range = of_get_property(dev, "bus-range", &len); |
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if ((bus_range == NULL) || (len < 2 * sizeof(int))) |
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printk(KERN_WARNING "Can't get bus-range for %s, assume" |
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" bus 0\n", dev->full_name); |
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hose = pcibios_alloc_controller(dev); |
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if (hose == NULL) |
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return -ENOMEM; |
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hose->first_busno = bus_range ? bus_range[0] : 0; |
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hose->last_busno = bus_range ? bus_range[1] : 0xff; |
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setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0); |
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/* Interpret the "ranges" property */ |
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/* This also maps the I/O region and sets isa_io/mem_base */ |
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pci_process_bridge_OF_ranges(hose, dev, 1); |
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return 0; |
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} |
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void __init amigaone_setup_arch(void) |
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{ |
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struct device_node *np; |
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int phb = -ENODEV; |
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/* Lookup PCI host bridges. */ |
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for_each_compatible_node(np, "pci", "mai-logic,articia-s") |
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phb = amigaone_add_bridge(np); |
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BUG_ON(phb != 0); |
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if (ppc_md.progress) |
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ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0); |
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} |
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void __init amigaone_init_IRQ(void) |
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{ |
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struct device_node *pic, *np = NULL; |
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const unsigned long *prop = NULL; |
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unsigned long int_ack = 0; |
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/* Search for ISA interrupt controller. */ |
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pic = of_find_compatible_node(NULL, "interrupt-controller", |
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"pnpPNP,000"); |
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BUG_ON(pic == NULL); |
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/* Look for interrupt acknowledge address in the PCI root node. */ |
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np = of_find_compatible_node(NULL, "pci", "mai-logic,articia-s"); |
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if (np) { |
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prop = of_get_property(np, "8259-interrupt-acknowledge", NULL); |
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if (prop) |
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int_ack = prop[0]; |
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of_node_put(np); |
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} |
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if (int_ack == 0) |
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printk(KERN_WARNING "Cannot find PCI interrupt acknowledge" |
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" address, polling\n"); |
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i8259_init(pic, int_ack); |
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ppc_md.get_irq = i8259_irq; |
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irq_set_default_host(i8259_get_host()); |
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} |
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void __init amigaone_init(void) |
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{ |
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request_region(0x00, 0x20, "dma1"); |
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request_region(0x40, 0x20, "timer"); |
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request_region(0x80, 0x10, "dma page reg"); |
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request_region(0xc0, 0x20, "dma2"); |
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} |
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void amigaone_restart(char *cmd) |
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{ |
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local_irq_disable(); |
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/* Flush and disable caches. */ |
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__flush_disable_L1(); |
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/* Set SRR0 to the reset vector and turn on MSR_IP. */ |
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mtspr(SPRN_SRR0, 0xfff00100); |
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mtspr(SPRN_SRR1, MSR_IP); |
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/* Do an rfi to jump back to firmware. */ |
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__asm__ __volatile__("rfi" : : : "memory"); |
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/* Not reached. */ |
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while (1); |
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} |
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static int __init amigaone_probe(void) |
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{ |
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unsigned long root = of_get_flat_dt_root(); |
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if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) { |
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/*
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* Coherent memory access cause complete system lockup! Thus |
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* disable this CPU feature, even if the CPU needs it. |
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*/ |
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cur_cpu_spec->cpu_features &= ~CPU_FTR_NEED_COHERENT; |
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ISA_DMA_THRESHOLD = 0x00ffffff; |
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DMA_MODE_READ = 0x44; |
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DMA_MODE_WRITE = 0x48; |
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return 1; |
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} |
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return 0; |
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} |
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define_machine(amigaone) { |
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.name = "AmigaOne", |
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.probe = amigaone_probe, |
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.setup_arch = amigaone_setup_arch, |
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.init = amigaone_init, |
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.show_cpuinfo = amigaone_show_cpuinfo, |
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.init_IRQ = amigaone_init_IRQ, |
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.restart = amigaone_restart, |
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.calibrate_decr = generic_calibrate_decr, |
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.progress = udbg_progress, |
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}; |
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