Hand optimised asm code for ARC700 pipeline. Originally written/optimized by Joern Rennecke Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Joern Rennecke <joern.rennecke@embecosm.com>tirimbino
Vineet Gupta
12 years ago
parent
6e35fa2d43
commit
5210d1e688
@ -0,0 +1,40 @@ |
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/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* vineetg: May 2011 |
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* -We had half-optimised memset/memcpy, got better versions of those |
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* -Added memcmp, strchr, strcpy, strcmp, strlen |
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* |
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* Amit Bhor: Codito Technologies 2004 |
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*/ |
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#ifndef _ASM_ARC_STRING_H |
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#define _ASM_ARC_STRING_H |
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#include <linux/types.h> |
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#ifdef __KERNEL__ |
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#define __HAVE_ARCH_MEMSET |
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#define __HAVE_ARCH_MEMCPY |
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#define __HAVE_ARCH_MEMCMP |
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#define __HAVE_ARCH_STRCHR |
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#define __HAVE_ARCH_STRCPY |
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#define __HAVE_ARCH_STRCMP |
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#define __HAVE_ARCH_STRLEN |
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extern void *memset(void *ptr, int, __kernel_size_t); |
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extern void *memcpy(void *, const void *, __kernel_size_t); |
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extern void memzero(void *ptr, __kernel_size_t n); |
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extern int memcmp(const void *, const void *, __kernel_size_t); |
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extern char *strchr(const char *s, int c); |
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extern char *strcpy(char *dest, const char *src); |
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extern int strcmp(const char *cs, const char *ct); |
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extern __kernel_size_t strlen(const char *); |
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#endif /* __KERNEL__ */ |
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#endif /* _ASM_ARC_STRING_H */ |
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@ -0,0 +1,124 @@ |
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/* |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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#include <asm/linkage.h> |
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#ifdef __LITTLE_ENDIAN__ |
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#define WORD2 r2 |
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#define SHIFT r3 |
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#else /* BIG ENDIAN */ |
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#define WORD2 r3 |
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#define SHIFT r2 |
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#endif |
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ARC_ENTRY memcmp |
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or r12,r0,r1 |
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asl_s r12,r12,30 |
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sub r3,r2,1 |
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brls r2,r12,.Lbytewise |
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ld r4,[r0,0] |
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ld r5,[r1,0] |
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lsr.f lp_count,r3,3 |
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lpne .Loop_end |
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ld_s WORD2,[r0,4] |
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ld_s r12,[r1,4] |
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brne r4,r5,.Leven |
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ld.a r4,[r0,8] |
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ld.a r5,[r1,8] |
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brne WORD2,r12,.Lodd |
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.Loop_end: |
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asl_s SHIFT,SHIFT,3 |
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bhs_s .Last_cmp |
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brne r4,r5,.Leven |
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ld r4,[r0,4] |
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ld r5,[r1,4] |
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#ifdef __LITTLE_ENDIAN__ |
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nop_s |
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; one more load latency cycle
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.Last_cmp: |
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xor r0,r4,r5 |
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bset r0,r0,SHIFT |
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sub_s r1,r0,1 |
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bic_s r1,r1,r0 |
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norm r1,r1 |
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b.d .Leven_cmp |
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and r1,r1,24 |
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.Leven: |
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xor r0,r4,r5 |
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sub_s r1,r0,1 |
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bic_s r1,r1,r0 |
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norm r1,r1 |
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; slow track insn
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and r1,r1,24 |
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.Leven_cmp: |
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asl r2,r4,r1 |
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asl r12,r5,r1 |
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lsr_s r2,r2,1 |
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lsr_s r12,r12,1 |
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j_s.d [blink] |
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sub r0,r2,r12 |
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.balign 4
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.Lodd: |
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xor r0,WORD2,r12 |
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sub_s r1,r0,1 |
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bic_s r1,r1,r0 |
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norm r1,r1 |
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; slow track insn
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and r1,r1,24 |
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asl_s r2,r2,r1 |
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asl_s r12,r12,r1 |
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lsr_s r2,r2,1 |
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lsr_s r12,r12,1 |
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j_s.d [blink] |
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sub r0,r2,r12 |
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#else /* BIG ENDIAN */ |
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.Last_cmp: |
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neg_s SHIFT,SHIFT |
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lsr r4,r4,SHIFT |
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lsr r5,r5,SHIFT |
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; slow track insn
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.Leven: |
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sub.f r0,r4,r5 |
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mov.ne r0,1 |
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j_s.d [blink] |
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bset.cs r0,r0,31 |
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.Lodd: |
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cmp_s WORD2,r12 |
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mov_s r0,1 |
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j_s.d [blink] |
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bset.cs r0,r0,31 |
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#endif /* ENDIAN */ |
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.balign 4
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.Lbytewise: |
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breq r2,0,.Lnil |
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ldb r4,[r0,0] |
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ldb r5,[r1,0] |
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lsr.f lp_count,r3 |
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lpne .Lbyte_end |
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ldb_s r3,[r0,1] |
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ldb r12,[r1,1] |
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brne r4,r5,.Lbyte_even |
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ldb.a r4,[r0,2] |
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ldb.a r5,[r1,2] |
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brne r3,r12,.Lbyte_odd |
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.Lbyte_end: |
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bcc .Lbyte_even |
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brne r4,r5,.Lbyte_even |
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ldb_s r3,[r0,1] |
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ldb_s r12,[r1,1] |
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.Lbyte_odd: |
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j_s.d [blink] |
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sub r0,r3,r12 |
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.Lbyte_even: |
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j_s.d [blink] |
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sub r0,r4,r5 |
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.Lnil: |
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j_s.d [blink] |
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mov r0,0 |
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ARC_EXIT memcmp |
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@ -0,0 +1,66 @@ |
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/* |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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#include <asm/linkage.h> |
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ARC_ENTRY memcpy |
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or r3,r0,r1 |
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asl_s r3,r3,30 |
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mov_s r5,r0 |
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brls.d r2,r3,.Lcopy_bytewise |
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sub.f r3,r2,1 |
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ld_s r12,[r1,0] |
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asr.f lp_count,r3,3 |
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bbit0.d r3,2,.Lnox4 |
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bmsk_s r2,r2,1 |
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st.ab r12,[r5,4] |
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ld.a r12,[r1,4] |
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.Lnox4: |
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lppnz .Lendloop |
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ld_s r3,[r1,4] |
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st.ab r12,[r5,4] |
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ld.a r12,[r1,8] |
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st.ab r3,[r5,4] |
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.Lendloop: |
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breq r2,0,.Last_store |
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ld r3,[r5,0] |
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#ifdef __LITTLE_ENDIAN__ |
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add3 r2,-1,r2 |
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; uses long immediate
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xor_s r12,r12,r3 |
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bmsk r12,r12,r2 |
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xor_s r12,r12,r3 |
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#else /* BIG ENDIAN */ |
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sub3 r2,31,r2 |
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; uses long immediate
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xor_s r3,r3,r12 |
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bmsk r3,r3,r2 |
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xor_s r12,r12,r3 |
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#endif /* ENDIAN */ |
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.Last_store: |
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j_s.d [blink] |
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st r12,[r5,0] |
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.balign 4
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.Lcopy_bytewise: |
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jcs [blink] |
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ldb_s r12,[r1,0] |
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lsr.f lp_count,r3 |
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bhs_s .Lnox1 |
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stb.ab r12,[r5,1] |
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ldb.a r12,[r1,1] |
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.Lnox1: |
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lppnz .Lendbloop |
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ldb_s r3,[r1,1] |
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stb.ab r12,[r5,1] |
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ldb.a r12,[r1,2] |
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stb.ab r3,[r5,1] |
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.Lendbloop: |
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j_s.d [blink] |
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stb r12,[r5,0] |
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ARC_EXIT memcpy |
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@ -0,0 +1,59 @@ |
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/* |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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#include <asm/linkage.h> |
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#define SMALL 7 /* Must be at least 6 to deal with alignment/loop issues. */ |
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ARC_ENTRY memset |
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mov_s r4,r0 |
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or r12,r0,r2 |
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bmsk.f r12,r12,1 |
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extb_s r1,r1 |
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asl r3,r1,8 |
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beq.d .Laligned |
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or_s r1,r1,r3 |
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brls r2,SMALL,.Ltiny |
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add r3,r2,r0 |
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stb r1,[r3,-1] |
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bclr_s r3,r3,0 |
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stw r1,[r3,-2] |
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bmsk.f r12,r0,1 |
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add_s r2,r2,r12 |
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sub.ne r2,r2,4 |
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stb.ab r1,[r4,1] |
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and r4,r4,-2 |
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stw.ab r1,[r4,2] |
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and r4,r4,-4 |
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.Laligned: ; This code address should be aligned for speed.
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asl r3,r1,16 |
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lsr.f lp_count,r2,2 |
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or_s r1,r1,r3 |
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lpne .Loop_end |
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st.ab r1,[r4,4] |
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.Loop_end: |
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j_s [blink] |
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.balign 4
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.Ltiny: |
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mov.f lp_count,r2 |
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lpne .Ltiny_end |
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stb.ab r1,[r4,1] |
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.Ltiny_end: |
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j_s [blink] |
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ARC_EXIT memset |
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; memzero: @r0 = mem, @r1 = size_t
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; memset: @r0 = mem, @r1 = char, @r2 = size_t
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ARC_ENTRY memzero |
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; adjust bzero args to memset args
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mov r2, r1 |
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mov r1, 0 |
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b memset ;tail call so need to tinker with blink
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ARC_EXIT memzero |
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@ -0,0 +1,123 @@ |
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/* |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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/* ARC700 has a relatively long pipeline and branch prediction, so we want |
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to avoid branches that are hard to predict. On the other hand, the |
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presence of the norm instruction makes it easier to operate on whole |
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words branch-free. */ |
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#include <asm/linkage.h> |
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ARC_ENTRY strchr |
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extb_s r1,r1 |
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asl r5,r1,8 |
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bmsk r2,r0,1 |
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or r5,r5,r1 |
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mov_s r3,0x01010101 |
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breq.d r2,r0,.Laligned |
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asl r4,r5,16 |
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sub_s r0,r0,r2 |
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asl r7,r2,3 |
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ld_s r2,[r0] |
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#ifdef __LITTLE_ENDIAN__ |
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asl r7,r3,r7 |
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#else |
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lsr r7,r3,r7 |
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#endif |
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or r5,r5,r4 |
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ror r4,r3 |
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sub r12,r2,r7 |
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bic_s r12,r12,r2 |
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and r12,r12,r4 |
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brne.d r12,0,.Lfound0_ua |
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xor r6,r2,r5 |
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ld.a r2,[r0,4] |
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sub r12,r6,r7 |
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bic r12,r12,r6 |
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and r7,r12,r4 |
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breq r7,0,.Loop ; For speed, we want this branch to be unaligned.
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b .Lfound_char ; Likewise this one.
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; /* We require this code address to be unaligned for speed... */
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.Laligned: |
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ld_s r2,[r0] |
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or r5,r5,r4 |
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ror r4,r3 |
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; /* ... so that this code address is aligned, for itself and ... */
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.Loop: |
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sub r12,r2,r3 |
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bic_s r12,r12,r2 |
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and r12,r12,r4 |
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brne.d r12,0,.Lfound0 |
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xor r6,r2,r5 |
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ld.a r2,[r0,4] |
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sub r12,r6,r3 |
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bic r12,r12,r6 |
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and r7,r12,r4 |
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breq r7,0,.Loop /* ... so that this branch is unaligned. */ |
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; Found searched-for character. r0 has already advanced to next word.
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#ifdef __LITTLE_ENDIAN__ |
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/* We only need the information about the first matching byte |
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(i.e. the least significant matching byte) to be exact, |
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hence there is no problem with carry effects. */ |
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.Lfound_char: |
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sub r3,r7,1 |
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bic r3,r3,r7 |
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norm r2,r3 |
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sub_s r0,r0,1 |
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asr_s r2,r2,3 |
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j.d [blink] |
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sub_s r0,r0,r2 |
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.balign 4
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.Lfound0_ua: |
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mov r3,r7 |
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.Lfound0: |
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sub r3,r6,r3 |
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bic r3,r3,r6 |
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and r2,r3,r4 |
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or_s r12,r12,r2 |
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sub_s r3,r12,1 |
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bic_s r3,r3,r12 |
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norm r3,r3 |
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add_s r0,r0,3 |
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asr_s r12,r3,3 |
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asl.f 0,r2,r3 |
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sub_s r0,r0,r12 |
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j_s.d [blink] |
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mov.pl r0,0 |
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#else /* BIG ENDIAN */ |
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.Lfound_char: |
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lsr r7,r7,7 |
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bic r2,r7,r6 |
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norm r2,r2 |
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sub_s r0,r0,4 |
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asr_s r2,r2,3 |
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j.d [blink] |
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add_s r0,r0,r2 |
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.Lfound0_ua: |
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mov_s r3,r7 |
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.Lfound0: |
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asl_s r2,r2,7 |
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or r7,r6,r4 |
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bic_s r12,r12,r2 |
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sub r2,r7,r3 |
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or r2,r2,r6 |
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bic r12,r2,r12 |
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bic.f r3,r4,r12 |
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norm r3,r3 |
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add.pl r3,r3,1 |
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asr_s r12,r3,3 |
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asl.f 0,r2,r3 |
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add_s r0,r0,r12 |
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j_s.d [blink] |
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mov.mi r0,0 |
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#endif /* ENDIAN */ |
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ARC_EXIT strchr |
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@ -0,0 +1,96 @@ |
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/* |
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
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* |
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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/* This is optimized primarily for the ARC700. |
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It would be possible to speed up the loops by one cycle / word |
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respective one cycle / byte by forcing double source 1 alignment, unrolling |
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by a factor of two, and speculatively loading the second word / byte of |
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source 1; however, that would increase the overhead for loop setup / finish,
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and strcmp might often terminate early. */ |
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#include <asm/linkage.h> |
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ARC_ENTRY strcmp |
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or r2,r0,r1 |
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bmsk_s r2,r2,1 |
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brne r2,0,.Lcharloop |
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mov_s r12,0x01010101 |
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ror r5,r12 |
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.Lwordloop: |
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ld.ab r2,[r0,4] |
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ld.ab r3,[r1,4] |
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nop_s |
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sub r4,r2,r12 |
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bic r4,r4,r2 |
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and r4,r4,r5 |
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brne r4,0,.Lfound0 |
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breq r2,r3,.Lwordloop |
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#ifdef __LITTLE_ENDIAN__ |
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xor r0,r2,r3 ; mask for difference
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sub_s r1,r0,1 |
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bic_s r0,r0,r1 ; mask for least significant difference bit
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sub r1,r5,r0 |
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xor r0,r5,r1 ; mask for least significant difference byte
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and_s r2,r2,r0 |
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and_s r3,r3,r0 |
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#endif /* LITTLE ENDIAN */ |
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cmp_s r2,r3 |
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mov_s r0,1 |
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j_s.d [blink] |
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bset.lo r0,r0,31 |
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.balign 4
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#ifdef __LITTLE_ENDIAN__ |
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.Lfound0: |
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xor r0,r2,r3 ; mask for difference
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or r0,r0,r4 ; or in zero indicator
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sub_s r1,r0,1 |
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bic_s r0,r0,r1 ; mask for least significant difference bit
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sub r1,r5,r0 |
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xor r0,r5,r1 ; mask for least significant difference byte
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and_s r2,r2,r0 |
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and_s r3,r3,r0 |
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sub.f r0,r2,r3 |
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mov.hi r0,1 |
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j_s.d [blink] |
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bset.lo r0,r0,31 |
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#else /* BIG ENDIAN */ |
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/* The zero-detection above can mis-detect 0x01 bytes as zeroes |
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because of carry-propagateion from a lower significant zero byte. |
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We can compensate for this by checking that bit0 is zero. |
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This compensation is not necessary in the step where we |
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get a low estimate for r2, because in any affected bytes |
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we already have 0x00 or 0x01, which will remain unchanged |
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when bit 7 is cleared. */ |
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.balign 4
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.Lfound0: |
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lsr r0,r4,8 |
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lsr_s r1,r2 |
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bic_s r2,r2,r0 ; get low estimate for r2 and get ...
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bic_s r0,r0,r1 ; <this is the adjusted mask for zeros>
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or_s r3,r3,r0 ; ... high estimate r3 so that r2 > r3 will ...
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cmp_s r3,r2 ; ... be independent of trailing garbage
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or_s r2,r2,r0 ; likewise for r3 > r2
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bic_s r3,r3,r0 |
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rlc r0,0 ; r0 := r2 > r3 ? 1 : 0
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cmp_s r2,r3 |
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j_s.d [blink] |
||||
bset.lo r0,r0,31 |
||||
#endif /* ENDIAN */ |
||||
|
||||
.balign 4
|
||||
.Lcharloop: |
||||
ldb.ab r2,[r0,1] |
||||
ldb.ab r3,[r1,1] |
||||
nop_s |
||||
breq r2,0,.Lcmpend |
||||
breq r2,r3,.Lcharloop |
||||
.Lcmpend: |
||||
j_s.d [blink] |
||||
sub r0,r2,r3 |
||||
ARC_EXIT strcmp |
||||
@ -0,0 +1,70 @@ |
||||
/* |
||||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
/* If dst and src are 4 byte aligned, copy 8 bytes at a time. |
||||
If the src is 4, but not 8 byte aligned, we first read 4 bytes to get |
||||
it 8 byte aligned. Thus, we can do a little read-ahead, without |
||||
dereferencing a cache line that we should not touch. |
||||
Note that short and long instructions have been scheduled to avoid |
||||
branch stalls. |
||||
The beq_s to r3z could be made unaligned & long to avoid a stall |
||||
there, but the it is not likely to be taken often, and it |
||||
would also be likey to cost an unaligned mispredict at the next call. */ |
||||
|
||||
#include <asm/linkage.h> |
||||
|
||||
ARC_ENTRY strcpy |
||||
or r2,r0,r1 |
||||
bmsk_s r2,r2,1 |
||||
brne.d r2,0,charloop |
||||
mov_s r10,r0 |
||||
ld_s r3,[r1,0] |
||||
mov r8,0x01010101 |
||||
bbit0.d r1,2,loop_start |
||||
ror r12,r8 |
||||
sub r2,r3,r8 |
||||
bic_s r2,r2,r3 |
||||
tst_s r2,r12 |
||||
bne r3z |
||||
mov_s r4,r3 |
||||
.balign 4
|
||||
loop: |
||||
ld.a r3,[r1,4] |
||||
st.ab r4,[r10,4] |
||||
loop_start: |
||||
ld.a r4,[r1,4] |
||||
sub r2,r3,r8 |
||||
bic_s r2,r2,r3 |
||||
tst_s r2,r12 |
||||
bne_s r3z |
||||
st.ab r3,[r10,4] |
||||
sub r2,r4,r8 |
||||
bic r2,r2,r4 |
||||
tst r2,r12 |
||||
beq loop |
||||
mov_s r3,r4 |
||||
#ifdef __LITTLE_ENDIAN__ |
||||
r3z: bmsk.f r1,r3,7 |
||||
lsr_s r3,r3,8 |
||||
#else |
||||
r3z: lsr.f r1,r3,24 |
||||
asl_s r3,r3,8 |
||||
#endif |
||||
bne.d r3z |
||||
stb.ab r1,[r10,1] |
||||
j_s [blink] |
||||
|
||||
.balign 4
|
||||
charloop: |
||||
ldb.ab r3,[r1,1] |
||||
|
||||
|
||||
brne.d r3,0,charloop |
||||
stb.ab r3,[r10,1] |
||||
j [blink] |
||||
ARC_EXIT strcpy |
||||
@ -0,0 +1,83 @@ |
||||
/* |
||||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
#include <asm/linkage.h> |
||||
|
||||
ARC_ENTRY strlen |
||||
or r3,r0,7 |
||||
ld r2,[r3,-7] |
||||
ld.a r6,[r3,-3] |
||||
mov r4,0x01010101 |
||||
; uses long immediate
|
||||
#ifdef __LITTLE_ENDIAN__ |
||||
asl_s r1,r0,3 |
||||
btst_s r0,2 |
||||
asl r7,r4,r1 |
||||
ror r5,r4 |
||||
sub r1,r2,r7 |
||||
bic_s r1,r1,r2 |
||||
mov.eq r7,r4 |
||||
sub r12,r6,r7 |
||||
bic r12,r12,r6 |
||||
or.eq r12,r12,r1 |
||||
and r12,r12,r5 |
||||
brne r12,0,.Learly_end |
||||
#else /* BIG ENDIAN */ |
||||
ror r5,r4 |
||||
btst_s r0,2 |
||||
mov_s r1,31 |
||||
sub3 r7,r1,r0 |
||||
sub r1,r2,r4 |
||||
bic_s r1,r1,r2 |
||||
bmsk r1,r1,r7 |
||||
sub r12,r6,r4 |
||||
bic r12,r12,r6 |
||||
bmsk.ne r12,r12,r7 |
||||
or.eq r12,r12,r1 |
||||
and r12,r12,r5 |
||||
brne r12,0,.Learly_end |
||||
#endif /* ENDIAN */ |
||||
|
||||
.Loop: |
||||
ld_s r2,[r3,4] |
||||
ld.a r6,[r3,8] |
||||
; stall for load result
|
||||
sub r1,r2,r4 |
||||
bic_s r1,r1,r2 |
||||
sub r12,r6,r4 |
||||
bic r12,r12,r6 |
||||
or r12,r12,r1 |
||||
and r12,r12,r5 |
||||
breq r12,0,.Loop |
||||
.Lend: |
||||
and.f r1,r1,r5 |
||||
sub.ne r3,r3,4 |
||||
mov.eq r1,r12 |
||||
#ifdef __LITTLE_ENDIAN__ |
||||
sub_s r2,r1,1 |
||||
bic_s r2,r2,r1 |
||||
norm r1,r2 |
||||
sub_s r0,r0,3 |
||||
lsr_s r1,r1,3 |
||||
sub r0,r3,r0 |
||||
j_s.d [blink] |
||||
sub r0,r0,r1 |
||||
#else /* BIG ENDIAN */ |
||||
lsr_s r1,r1,7 |
||||
mov.eq r2,r6 |
||||
bic_s r1,r1,r2 |
||||
norm r1,r1 |
||||
sub r0,r3,r0 |
||||
lsr_s r1,r1,3 |
||||
j_s.d [blink] |
||||
add r0,r0,r1 |
||||
#endif /* ENDIAN */ |
||||
.Learly_end: |
||||
b.d .Lend |
||||
sub_s.ne r1,r1,r1 |
||||
ARC_EXIT strlen |
||||
Loading…
Reference in new issue