Merge s3c2442.c and clock.c as the s3c242.c does not contain much and the clock parts are always built for s3c2442 anyway. Signed-off-by: Ben Dooks <ben-linux@fluff.org>tirimbino
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/* linux/arch/arm/mach-s3c2442/clock.c
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* |
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* Copyright (c) 2004-2005 Simtec Electronics |
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk> |
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* |
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* S3C2442 Clock support |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#include <linux/init.h> |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/list.h> |
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#include <linux/errno.h> |
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#include <linux/err.h> |
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#include <linux/device.h> |
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#include <linux/sysdev.h> |
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#include <linux/interrupt.h> |
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#include <linux/ioport.h> |
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#include <linux/mutex.h> |
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#include <linux/clk.h> |
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#include <linux/io.h> |
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#include <mach/hardware.h> |
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#include <asm/atomic.h> |
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#include <asm/irq.h> |
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#include <mach/regs-clock.h> |
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#include <plat/clock.h> |
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#include <plat/cpu.h> |
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/* S3C2442 extended clock support */ |
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static unsigned long s3c2442_camif_upll_round(struct clk *clk, |
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unsigned long rate) |
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{ |
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unsigned long parent_rate = clk_get_rate(clk->parent); |
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int div; |
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if (rate > parent_rate) |
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return parent_rate; |
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div = parent_rate / rate; |
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if (div == 3) |
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return parent_rate / 3; |
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/* note, we remove the +/- 1 calculations for the divisor */ |
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div /= 2; |
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if (div < 1) |
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div = 1; |
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else if (div > 16) |
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div = 16; |
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return parent_rate / (div * 2); |
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} |
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static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate) |
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{ |
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unsigned long parent_rate = clk_get_rate(clk->parent); |
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unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); |
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rate = s3c2442_camif_upll_round(clk, rate); |
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camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3; |
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if (rate == parent_rate) { |
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camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL; |
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} else if ((parent_rate / rate) == 3) { |
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camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; |
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camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3; |
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} else { |
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camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK; |
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camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; |
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camdivn |= (((parent_rate / rate) / 2) - 1); |
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} |
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__raw_writel(camdivn, S3C2440_CAMDIVN); |
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return 0; |
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} |
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/* Extra S3C2442 clocks */ |
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static struct clk s3c2442_clk_cam = { |
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.name = "camif", |
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.id = -1, |
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.enable = s3c2410_clkcon_enable, |
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.ctrlbit = S3C2440_CLKCON_CAMERA, |
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}; |
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static struct clk s3c2442_clk_cam_upll = { |
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.name = "camif-upll", |
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.id = -1, |
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.ops = &(struct clk_ops) { |
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.set_rate = s3c2442_camif_upll_setrate, |
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.round_rate = s3c2442_camif_upll_round, |
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}, |
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}; |
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static int s3c2442_clk_add(struct sys_device *sysdev) |
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{ |
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struct clk *clock_upll; |
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struct clk *clock_h; |
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struct clk *clock_p; |
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clock_p = clk_get(NULL, "pclk"); |
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clock_h = clk_get(NULL, "hclk"); |
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clock_upll = clk_get(NULL, "upll"); |
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if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) { |
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printk(KERN_ERR "S3C2442: Failed to get parent clocks\n"); |
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return -EINVAL; |
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} |
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s3c2442_clk_cam.parent = clock_h; |
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s3c2442_clk_cam_upll.parent = clock_upll; |
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s3c24xx_register_clock(&s3c2442_clk_cam); |
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s3c24xx_register_clock(&s3c2442_clk_cam_upll); |
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clk_disable(&s3c2442_clk_cam); |
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return 0; |
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} |
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static struct sysdev_driver s3c2442_clk_driver = { |
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.add = s3c2442_clk_add, |
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}; |
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static __init int s3c2442_clk_init(void) |
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{ |
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return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); |
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} |
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arch_initcall(s3c2442_clk_init); |
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