MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.

Most supported systems currently hardwire cpu_has_dsp to 0, so we also
can disable support for cpu_has_dsp2 resulting in a slightly smaller
kernel.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
tirimbino
Ralf Baechle 13 years ago
parent ee80f7c73d
commit 475032564e
  1. 2
      arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
  2. 1
      arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
  3. 1
      arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
  4. 1
      arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
  5. 1
      arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
  6. 1
      arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
  7. 1
      arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
  8. 1
      arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
  9. 1
      arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
  10. 1
      arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
  11. 1
      arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
  12. 1
      arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
  13. 1
      arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
  14. 1
      arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
  15. 1
      arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
  16. 1
      arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
  17. 1
      arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
  18. 1
      arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
  19. 1
      arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h

@ -42,6 +42,8 @@
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_64bits 0

@ -37,6 +37,7 @@
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_has_nofpuex 0

@ -37,6 +37,7 @@
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -53,6 +53,7 @@
#define cpu_has_mips64r2 1
#define cpu_has_mips_r2_exec_hazard 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_vint 0
#define cpu_has_veic 0

@ -45,6 +45,7 @@
#define cpu_has_ic_fills_f_dc 0
#define cpu_icache_snoops_remote_store 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -30,6 +30,7 @@
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -26,6 +26,7 @@
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_icache_snoops_remote_store 1
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -27,6 +27,7 @@
#define cpu_has_dc_aliases 0 /* see probe_pcache() */
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_icache_snoops_remote_store 1
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -37,6 +37,7 @@
#define cpu_has_vtag_icache 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_4k_cache 1
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -38,6 +38,7 @@
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_has_nofpuex 0

@ -32,6 +32,7 @@
#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
#define cpu_has_divec 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_ejtag 0
#define cpu_has_fpu 1
#define cpu_has_ic_fills_f_dc 0

@ -26,6 +26,7 @@
#define cpu_has_vtag_icache 0
#define cpu_has_ic_fills_f_dc 1
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_icache_snoops_remote_store 1

@ -45,6 +45,7 @@
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_has_nofpuex 0

@ -60,6 +60,7 @@
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
/* #define cpu_has_nofpuex ? */

@ -30,6 +30,7 @@
#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
#define cpu_has_mipsmt 0

@ -26,6 +26,7 @@
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_icache_snoops_remote_store 0

@ -12,6 +12,7 @@
#define cpu_has_vtag_icache 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0

@ -26,6 +26,7 @@
#define cpu_has_dc_aliases 0
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_dsp 0
#define cpu_has_dsp2 0
#define cpu_has_mipsmt 0
#define cpu_has_userlocal 0
#define cpu_icache_snoops_remote_store 0

@ -10,6 +10,7 @@
#define cpu_has_mips16 1
#define cpu_has_dsp 1
/* #define cpu_has_dsp2 ??? - do runtime detection */
#define cpu_has_mipsmt 1
#define cpu_has_fpu 0

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