@ -39,6 +39,14 @@
# define T T B _ F L A G S _ S M P ( T T B _ I R G N _ W B W A | T T B _ S | T T B _ R G N _ O C _ W B W A )
# define P M D _ F L A G S _ S M P ( P M D _ S E C T _ W B W A | P M D _ S E C T _ S )
# ifndef _ _ A R M E B _ _
# define r p g d l r0
# define r p g d h r1
# else
# define r p g d l r1
# define r p g d h r0
# endif
/ *
* cpu_ v7 _ s w i t c h _ m m ( p g d _ p h y s , t s k )
*
@ -47,10 +55,10 @@
* /
ENTRY( c p u _ v7 _ s w i t c h _ m m )
# ifdef C O N F I G _ M M U
mmid r1 , r1 @ get mm->context.id
asid r3 , r1
mov r3 , r3 , l s l #( 48 - 3 2 ) @ ASID
mcrr p15 , 0 , r0 , r3 , c2 @ set TTB 0
mmid r2 , r2
asid r2 , r2
orr r p g d h , r p g d h , r2 , l s l #( 48 - 3 2 ) @ upper 32-bits of pgd
mcrr p15 , 0 , r p g d l , r p g d h , c2 @ set TTB 0
isb
# endif
mov p c , l r
@ -106,7 +114,8 @@ ENDPROC(cpu_v7_set_pte_ext)
* /
.macro v7 _ t t b _ s e t u p , z e r o , t t b r0 , t t b r1 , t m p
ldr \ t m p , =swapper_pg_dir @ swapper_pg_dir virtual address
cmp \ t t b r1 , \ t m p @ PHYS_OFFSET > PAGE_OFFSET? (branch below)
mov \ t m p , \ t m p , l s r #A R C H _ P G D _ S H I F T
cmp \ t t b r1 , \ t m p @ PHYS_OFFSET > PAGE_OFFSET?
mrc p15 , 0 , \ t m p , c2 , c0 , 2 @ TTB control register
orr \ t m p , \ t m p , #T T B _ E A E
ALT_ S M P ( o r r \ t m p , \ t m p , #T T B _ F L A G S _ S M P )
@ -114,27 +123,21 @@ ENDPROC(cpu_v7_set_pte_ext)
ALT_ S M P ( o r r \ t m p , \ t m p , #T T B _ F L A G S _ S M P < < 16 )
ALT_ U P ( o r r \ t m p , \ t m p , #T T B _ F L A G S _ U P < < 16 )
/ *
* TTBR0 / T T B R 1 s p l i t ( P A G E _ O F F S E T ) :
* 0x40000000 : T0 S Z = 2 , T 1 S Z = 0 ( n o t u s e d )
* 0x80000000 : T0 S Z = 0 , T 1 S Z = 1
* 0xc0000000 : T0 S Z = 0 , T 1 S Z = 2
*
* Only u s e t h i s f e a t u r e i f P H Y S _ O F F S E T < = P A G E _ O F F S E T , o t h e r w i s e
* booting s e c o n d a r y C P U s w o u l d e n d u p u s i n g T T B R 1 f o r t h e i d e n t i t y
* mapping s e t u p i n T T B R 0 .
* Only u s e s p l i t T T B R s i f P H Y S _ O F F S E T < = P A G E _ O F F S E T ( c m p a b o v e ) ,
* otherwise b o o t i n g s e c o n d a r y C P U s w o u l d e n d u p u s i n g T T B R 1 f o r t h e
* identity m a p p i n g s e t u p i n T T B R 0 .
* /
bhi 9 0 0 1 f @ PHYS_OFFSET > PAGE_OFFSET?
orr \ t m p , \ t m p , #( ( ( P A G E _ O F F S E T > > 30 ) - 1 ) < < 1 6 ) @ TTBCR.T1SZ
# if d e f i n e d C O N F I G _ V M S P L I T _ 2 G
/* PAGE_OFFSET == 0x80000000, T1SZ == 1 */
add \ t t b r1 , \ t t b r1 , #1 < < 4 @ skip two L1 entries
# elif d e f i n e d C O N F I G _ V M S P L I T _ 3 G
/* PAGE_OFFSET == 0xc0000000, T1SZ == 2 */
add \ t t b r1 , \ t t b r1 , #4096 * ( 1 + 3 ) @ only L2 used, skip pgd+3*pmd
# endif
/* CONFIG_VMSPLIT_1G does not need TTBR1 adjustment */
9001 : mcr p15 , 0 , \ t m p , c2 , c0 , 2 @ TTB control register
mcrr p15 , 1 , \ t t b r1 , \ z e r o , c2 @ load TTBR1
orrls \ t m p , \ t m p , #T T B R 1 _ S I Z E @ TTBCR.T1SZ
mcr p15 , 0 , \ t m p , c2 , c0 , 2 @ TTBCR
mov \ t m p , \ t t b r1 , l s r #( 32 - A R C H _ P G D _ S H I F T ) @ upper bits
mov \ t t b r1 , \ t t b r1 , l s l #A R C H _ P G D _ S H I F T @ l o w e r b i t s
addls \ t t b r1 , \ t t b r1 , #T T B R 1 _ O F F S E T
mcrr p15 , 1 , \ t t b r1 , \ z e r o , c2 @ load TTBR1
mov \ t m p , \ t t b r0 , l s r #( 32 - A R C H _ P G D _ S H I F T ) @ upper bits
mov \ t t b r0 , \ t t b r0 , l s l #A R C H _ P G D _ S H I F T @ l o w e r b i t s
mcrr p15 , 0 , \ t t b r0 , \ z e r o , c2 @ load TTBR0
mcrr p15 , 1 , \ t t b r1 , \ z e r o , c2 @ load TTBR1
mcrr p15 , 0 , \ t t b r0 , \ z e r o , c2 @ load TTBR0
.endm
_ _ CPUINIT