Enumeration
- Read capability list as dwords, not bytes (Sean O. Stalley)
Resource management
- Don't check for PNP overlaps with unassigned PCI BARs (Bjorn Helgaas)
- Mark invalid BARs as unassigned (Bjorn Helgaas)
- Show driver, BAR#, and resource on pci_ioremap_bar() failure (Bjorn Helgaas)
- Fail pci_ioremap_bar() on unassigned resources (Bjorn Helgaas)
- Assign resources before drivers claim devices (Yijing Wang)
- Claim bus resources before pci_bus_add_devices() (Yijing Wang)
Power management
- Optimize device state transition delays (Aaron Lu)
- Don't clear ASPM bits when the FADT declares it's unsupported (Matthew Garrett)
Virtualization
- Add ACS quirks for Intel 1G NICs (Alex Williamson)
IOMMU
- Add ptr to OF node arg to of_iommu_configure() (Murali Karicheri)
- Move of_dma_configure() to device.c to help re-use (Murali Karicheri)
- Fix size when dma-range is not used (Murali Karicheri)
- Add helper functions pci_get[put]_host_bridge_device() (Murali Karicheri)
- Add of_pci_dma_configure() to update DMA configuration (Murali Karicheri)
- Update DMA configuration from DT (Murali Karicheri)
- dma-mapping: limit IOMMU mapping size (Murali Karicheri)
- Calculate device DMA masks based on DT dma-range size (Murali Karicheri)
ARM Versatile host bridge driver
- Check for devm_ioremap_resource() failures (Jisheng Zhang)
Broadcom iProc host bridge driver
- Add Broadcom iProc PCIe driver (Ray Jui)
Marvell MVEBU host bridge driver
- Add suspend/resume support (Thomas Petazzoni)
Renesas R-Car host bridge driver
- Fix position of MSI enable bit (Nobuhiro Iwamatsu)
- Write zeroes to reserved PCIEPARL bits (Nobuhiro Iwamatsu)
- Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAUR (Nobuhiro Iwamatsu)
- Verify that mem_res is 64K-aligned (Nobuhiro Iwamatsu)
Samsung Exynos host bridge driver
- Fix INTx enablement statement termination error (Jaehoon Chung)
Miscellaneous
- Make a shareable UUID for PCI firmware ACPI _DSM (Aaron Lu)
- Clarify policy for vendor IDs in pci.txt (Michael S. Tsirkin)
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Merge tag 'pci-v4.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
"Enumeration
- Read capability list as dwords, not bytes (Sean O. Stalley)
Resource management
- Don't check for PNP overlaps with unassigned PCI BARs (Bjorn Helgaas)
- Mark invalid BARs as unassigned (Bjorn Helgaas)
- Show driver, BAR#, and resource on pci_ioremap_bar() failure (Bjorn Helgaas)
- Fail pci_ioremap_bar() on unassigned resources (Bjorn Helgaas)
- Assign resources before drivers claim devices (Yijing Wang)
- Claim bus resources before pci_bus_add_devices() (Yijing Wang)
Power management
- Optimize device state transition delays (Aaron Lu)
- Don't clear ASPM bits when the FADT declares it's unsupported (Matthew Garrett)
Virtualization
- Add ACS quirks for Intel 1G NICs (Alex Williamson)
IOMMU
- Add ptr to OF node arg to of_iommu_configure() (Murali Karicheri)
- Move of_dma_configure() to device.c to help re-use (Murali Karicheri)
- Fix size when dma-range is not used (Murali Karicheri)
- Add helper functions pci_get[put]_host_bridge_device() (Murali Karicheri)
- Add of_pci_dma_configure() to update DMA configuration (Murali Karicheri)
- Update DMA configuration from DT (Murali Karicheri)
- dma-mapping: limit IOMMU mapping size (Murali Karicheri)
- Calculate device DMA masks based on DT dma-range size (Murali Karicheri)
ARM Versatile host bridge driver
- Check for devm_ioremap_resource() failures (Jisheng Zhang)
Broadcom iProc host bridge driver
- Add Broadcom iProc PCIe driver (Ray Jui)
Marvell MVEBU host bridge driver
- Add suspend/resume support (Thomas Petazzoni)
Renesas R-Car host bridge driver
- Fix position of MSI enable bit (Nobuhiro Iwamatsu)
- Write zeroes to reserved PCIEPARL bits (Nobuhiro Iwamatsu)
- Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAUR (Nobuhiro Iwamatsu)
- Verify that mem_res is 64K-aligned (Nobuhiro Iwamatsu)
Samsung Exynos host bridge driver
- Fix INTx enablement statement termination error (Jaehoon Chung)
Miscellaneous
- Make a shareable UUID for PCI firmware ACPI _DSM (Aaron Lu)
- Clarify policy for vendor IDs in pci.txt (Michael S. Tsirkin)"
* tag 'pci-v4.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (36 commits)
PCI: Read capability list as dwords, not bytes
PCI: layerscape: Simplify platform_get_resource_byname() failure checking
PCI: keystone: Don't dereference possible NULL pointer
PCI: versatile: Check for devm_ioremap_resource() failures
PCI: Don't clear ASPM bits when the FADT declares it's unsupported
PCI: Clarify policy for vendor IDs in pci.txt
PCI/ACPI: Optimize device state transition delays
PCI: Export pci_find_host_bridge() for use inside PCI core
PCI: Make a shareable UUID for PCI firmware ACPI _DSM
PCI: Fix typo in Thunderbolt kernel message
PCI: exynos: Fix INTx enablement statement termination error
PCI: iproc: Add Broadcom iProc PCIe support
PCI: iproc: Add DT docs for Broadcom iProc PCIe driver
PCI: Export symbols required for loadable host driver modules
PCI: Add ACS quirks for Intel 1G NICs
PCI: mvebu: Add suspend/resume support
PCI: Cleanup control flow
sparc/PCI: Claim bus resources before pci_bus_add_devices()
PCI: Assign resources before drivers claim devices (pci_scan_root_bus())
PCI: Fail pci_ioremap_bar() on unassigned resources
...
tirimbino
Linus Torvalds
10 years ago
commit
3be1b98e07
@ -0,0 +1,63 @@ |
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* Broadcom iProc PCIe controller with the platform bus interface |
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|
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Required properties: |
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- compatible: Must be "brcm,iproc-pcie" |
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- reg: base address and length of the PCIe controller I/O register space |
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- #interrupt-cells: set to <1> |
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- interrupt-map-mask and interrupt-map, standard PCI properties to define the |
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mapping of the PCIe interface to interrupt numbers |
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- linux,pci-domain: PCI domain ID. Should be unique for each host controller |
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- bus-range: PCI bus numbers covered |
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- #address-cells: set to <3> |
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- #size-cells: set to <2> |
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- device_type: set to "pci" |
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- ranges: ranges for the PCI memory and I/O regions |
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|
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Optional properties: |
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- phys: phandle of the PCIe PHY device |
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- phy-names: must be "pcie-phy" |
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|
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Example: |
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pcie0: pcie@18012000 { |
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compatible = "brcm,iproc-pcie"; |
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reg = <0x18012000 0x1000>; |
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|
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#interrupt-cells = <1>; |
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interrupt-map-mask = <0 0 0 0>; |
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interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; |
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|
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linux,pci-domain = <0>; |
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|
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bus-range = <0x00 0xff>; |
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|
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#address-cells = <3>; |
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#size-cells = <2>; |
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device_type = "pci"; |
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ranges = <0x81000000 0 0 0x28000000 0 0x00010000 |
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0x82000000 0 0x20000000 0x20000000 0 0x04000000>; |
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|
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phys = <&phy 0 5>; |
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phy-names = "pcie-phy"; |
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}; |
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|
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pcie1: pcie@18013000 { |
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compatible = "brcm,iproc-pcie"; |
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reg = <0x18013000 0x1000>; |
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|
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#interrupt-cells = <1>; |
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interrupt-map-mask = <0 0 0 0>; |
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interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; |
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|
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linux,pci-domain = <1>; |
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|
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bus-range = <0x00 0xff>; |
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|
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#address-cells = <3>; |
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#size-cells = <2>; |
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device_type = "pci"; |
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ranges = <0x81000000 0 0 0x48000000 0 0x00010000 |
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0x82000000 0 0x40000000 0x40000000 0 0x04000000>; |
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|
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phys = <&phy 1 6>; |
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phy-names = "pcie-phy"; |
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}; |
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@ -0,0 +1,108 @@ |
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/*
|
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* Copyright (C) 2015 Broadcom Corporation |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation version 2. |
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* |
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any |
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* kind, whether express or implied; without even the implied warranty |
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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|
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#include <linux/kernel.h> |
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#include <linux/pci.h> |
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#include <linux/clk.h> |
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#include <linux/module.h> |
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#include <linux/slab.h> |
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#include <linux/interrupt.h> |
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#include <linux/platform_device.h> |
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#include <linux/of_address.h> |
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#include <linux/of_pci.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_platform.h> |
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#include <linux/phy/phy.h> |
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|
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#include "pcie-iproc.h" |
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|
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static int iproc_pcie_pltfm_probe(struct platform_device *pdev) |
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{ |
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struct iproc_pcie *pcie; |
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struct device_node *np = pdev->dev.of_node; |
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struct resource reg; |
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resource_size_t iobase = 0; |
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LIST_HEAD(res); |
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int ret; |
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|
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pcie = devm_kzalloc(&pdev->dev, sizeof(struct iproc_pcie), GFP_KERNEL); |
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if (!pcie) |
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return -ENOMEM; |
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|
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pcie->dev = &pdev->dev; |
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platform_set_drvdata(pdev, pcie); |
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|
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ret = of_address_to_resource(np, 0, ®); |
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if (ret < 0) { |
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dev_err(pcie->dev, "unable to obtain controller resources\n"); |
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return ret; |
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} |
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|
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pcie->base = devm_ioremap(pcie->dev, reg.start, resource_size(®)); |
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if (!pcie->base) { |
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dev_err(pcie->dev, "unable to map controller registers\n"); |
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return -ENOMEM; |
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} |
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|
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/* PHY use is optional */ |
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pcie->phy = devm_phy_get(&pdev->dev, "pcie-phy"); |
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if (IS_ERR(pcie->phy)) { |
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if (PTR_ERR(pcie->phy) == -EPROBE_DEFER) |
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return -EPROBE_DEFER; |
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pcie->phy = NULL; |
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} |
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|
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ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &iobase); |
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if (ret) { |
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dev_err(pcie->dev, |
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"unable to get PCI host bridge resources\n"); |
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return ret; |
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} |
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|
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pcie->resources = &res; |
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|
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ret = iproc_pcie_setup(pcie); |
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if (ret) { |
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dev_err(pcie->dev, "PCIe controller setup failed\n"); |
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return ret; |
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} |
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|
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return 0; |
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} |
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|
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static int iproc_pcie_pltfm_remove(struct platform_device *pdev) |
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{ |
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struct iproc_pcie *pcie = platform_get_drvdata(pdev); |
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return iproc_pcie_remove(pcie); |
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} |
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|
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static const struct of_device_id iproc_pcie_of_match_table[] = { |
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{ .compatible = "brcm,iproc-pcie", }, |
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{ /* sentinel */ } |
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}; |
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MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table); |
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|
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static struct platform_driver iproc_pcie_pltfm_driver = { |
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.driver = { |
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.name = "iproc-pcie", |
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.of_match_table = of_match_ptr(iproc_pcie_of_match_table), |
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}, |
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.probe = iproc_pcie_pltfm_probe, |
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.remove = iproc_pcie_pltfm_remove, |
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}; |
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module_platform_driver(iproc_pcie_pltfm_driver); |
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|
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MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>"); |
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MODULE_DESCRIPTION("Broadcom iPROC PCIe platform driver"); |
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MODULE_LICENSE("GPL v2"); |
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@ -0,0 +1,268 @@ |
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/*
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* Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de> |
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* Copyright (C) 2015 Broadcom Corporatcommon ion |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation version 2. |
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* |
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any |
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* kind, whether express or implied; without even the implied warranty |
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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|
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#include <linux/kernel.h> |
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#include <linux/pci.h> |
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#include <linux/msi.h> |
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#include <linux/clk.h> |
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#include <linux/module.h> |
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#include <linux/mbus.h> |
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#include <linux/slab.h> |
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#include <linux/delay.h> |
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#include <linux/interrupt.h> |
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#include <linux/platform_device.h> |
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#include <linux/of_address.h> |
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#include <linux/of_pci.h> |
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#include <linux/of_irq.h> |
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#include <linux/of_platform.h> |
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#include <linux/phy/phy.h> |
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|
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#include "pcie-iproc.h" |
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|
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#define CLK_CONTROL_OFFSET 0x000 |
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#define EP_MODE_SURVIVE_PERST_SHIFT 1 |
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#define EP_MODE_SURVIVE_PERST BIT(EP_MODE_SURVIVE_PERST_SHIFT) |
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#define RC_PCIE_RST_OUTPUT_SHIFT 0 |
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#define RC_PCIE_RST_OUTPUT BIT(RC_PCIE_RST_OUTPUT_SHIFT) |
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|
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#define CFG_IND_ADDR_OFFSET 0x120 |
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#define CFG_IND_ADDR_MASK 0x00001ffc |
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|
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#define CFG_IND_DATA_OFFSET 0x124 |
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|
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#define CFG_ADDR_OFFSET 0x1f8 |
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#define CFG_ADDR_BUS_NUM_SHIFT 20 |
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#define CFG_ADDR_BUS_NUM_MASK 0x0ff00000 |
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#define CFG_ADDR_DEV_NUM_SHIFT 15 |
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#define CFG_ADDR_DEV_NUM_MASK 0x000f8000 |
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#define CFG_ADDR_FUNC_NUM_SHIFT 12 |
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#define CFG_ADDR_FUNC_NUM_MASK 0x00007000 |
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#define CFG_ADDR_REG_NUM_SHIFT 2 |
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#define CFG_ADDR_REG_NUM_MASK 0x00000ffc |
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#define CFG_ADDR_CFG_TYPE_SHIFT 0 |
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#define CFG_ADDR_CFG_TYPE_MASK 0x00000003 |
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|
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#define CFG_DATA_OFFSET 0x1fc |
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|
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#define SYS_RC_INTX_EN 0x330 |
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#define SYS_RC_INTX_MASK 0xf |
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|
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static inline struct iproc_pcie *sys_to_pcie(struct pci_sys_data *sys) |
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{ |
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return sys->private_data; |
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} |
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|
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/**
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* Note access to the configuration registers are protected at the higher layer |
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* by 'pci_lock' in drivers/pci/access.c |
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*/ |
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static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus, |
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unsigned int devfn, |
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int where) |
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{ |
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struct pci_sys_data *sys = bus->sysdata; |
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struct iproc_pcie *pcie = sys_to_pcie(sys); |
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unsigned slot = PCI_SLOT(devfn); |
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unsigned fn = PCI_FUNC(devfn); |
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unsigned busno = bus->number; |
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u32 val; |
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|
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/* root complex access */ |
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if (busno == 0) { |
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if (slot >= 1) |
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return NULL; |
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writel(where & CFG_IND_ADDR_MASK, |
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pcie->base + CFG_IND_ADDR_OFFSET); |
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return (pcie->base + CFG_IND_DATA_OFFSET); |
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} |
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|
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if (fn > 1) |
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return NULL; |
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|
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/* EP device access */ |
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val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | |
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(slot << CFG_ADDR_DEV_NUM_SHIFT) | |
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(fn << CFG_ADDR_FUNC_NUM_SHIFT) | |
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(where & CFG_ADDR_REG_NUM_MASK) | |
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(1 & CFG_ADDR_CFG_TYPE_MASK); |
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writel(val, pcie->base + CFG_ADDR_OFFSET); |
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return (pcie->base + CFG_DATA_OFFSET); |
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} |
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static struct pci_ops iproc_pcie_ops = { |
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.map_bus = iproc_pcie_map_cfg_bus, |
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.read = pci_generic_config_read32, |
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.write = pci_generic_config_write32, |
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}; |
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|
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static void iproc_pcie_reset(struct iproc_pcie *pcie) |
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{ |
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u32 val; |
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|
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/*
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* Configure the PCIe controller as root complex and send a downstream |
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* reset |
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*/ |
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val = EP_MODE_SURVIVE_PERST | RC_PCIE_RST_OUTPUT; |
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writel(val, pcie->base + CLK_CONTROL_OFFSET); |
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udelay(250); |
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val &= ~EP_MODE_SURVIVE_PERST; |
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writel(val, pcie->base + CLK_CONTROL_OFFSET); |
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msleep(250); |
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} |
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|
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static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus) |
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{ |
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u8 hdr_type; |
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u32 link_ctrl; |
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u16 pos, link_status; |
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int link_is_active = 0; |
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|
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/* make sure we are not in EP mode */ |
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pci_bus_read_config_byte(bus, 0, PCI_HEADER_TYPE, &hdr_type); |
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if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) { |
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dev_err(pcie->dev, "in EP mode, hdr=%#02x\n", hdr_type); |
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return -EFAULT; |
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} |
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|
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/* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */ |
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pci_bus_write_config_word(bus, 0, PCI_CLASS_DEVICE, |
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PCI_CLASS_BRIDGE_PCI); |
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|
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/* check link status to see if link is active */ |
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pos = pci_bus_find_capability(bus, 0, PCI_CAP_ID_EXP); |
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pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, &link_status); |
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if (link_status & PCI_EXP_LNKSTA_NLW) |
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link_is_active = 1; |
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|
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if (!link_is_active) { |
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/* try GEN 1 link speed */ |
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#define PCI_LINK_STATUS_CTRL_2_OFFSET 0x0dc |
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#define PCI_TARGET_LINK_SPEED_MASK 0xf |
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#define PCI_TARGET_LINK_SPEED_GEN2 0x2 |
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#define PCI_TARGET_LINK_SPEED_GEN1 0x1 |
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pci_bus_read_config_dword(bus, 0, |
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PCI_LINK_STATUS_CTRL_2_OFFSET, |
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&link_ctrl); |
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if ((link_ctrl & PCI_TARGET_LINK_SPEED_MASK) == |
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PCI_TARGET_LINK_SPEED_GEN2) { |
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link_ctrl &= ~PCI_TARGET_LINK_SPEED_MASK; |
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link_ctrl |= PCI_TARGET_LINK_SPEED_GEN1; |
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pci_bus_write_config_dword(bus, 0, |
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PCI_LINK_STATUS_CTRL_2_OFFSET, |
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link_ctrl); |
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msleep(100); |
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|
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pos = pci_bus_find_capability(bus, 0, PCI_CAP_ID_EXP); |
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pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, |
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&link_status); |
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if (link_status & PCI_EXP_LNKSTA_NLW) |
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link_is_active = 1; |
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} |
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} |
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|
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dev_info(pcie->dev, "link: %s\n", link_is_active ? "UP" : "DOWN"); |
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|
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return link_is_active ? 0 : -ENODEV; |
||||
} |
||||
|
||||
static void iproc_pcie_enable(struct iproc_pcie *pcie) |
||||
{ |
||||
writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN); |
||||
} |
||||
|
||||
int iproc_pcie_setup(struct iproc_pcie *pcie) |
||||
{ |
||||
int ret; |
||||
struct pci_bus *bus; |
||||
|
||||
if (!pcie || !pcie->dev || !pcie->base) |
||||
return -EINVAL; |
||||
|
||||
if (pcie->phy) { |
||||
ret = phy_init(pcie->phy); |
||||
if (ret) { |
||||
dev_err(pcie->dev, "unable to initialize PCIe PHY\n"); |
||||
return ret; |
||||
} |
||||
|
||||
ret = phy_power_on(pcie->phy); |
||||
if (ret) { |
||||
dev_err(pcie->dev, "unable to power on PCIe PHY\n"); |
||||
goto err_exit_phy; |
||||
} |
||||
|
||||
} |
||||
|
||||
iproc_pcie_reset(pcie); |
||||
|
||||
pcie->sysdata.private_data = pcie; |
||||
|
||||
bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops, |
||||
&pcie->sysdata, pcie->resources); |
||||
if (!bus) { |
||||
dev_err(pcie->dev, "unable to create PCI root bus\n"); |
||||
ret = -ENOMEM; |
||||
goto err_power_off_phy; |
||||
} |
||||
pcie->root_bus = bus; |
||||
|
||||
ret = iproc_pcie_check_link(pcie, bus); |
||||
if (ret) { |
||||
dev_err(pcie->dev, "no PCIe EP device detected\n"); |
||||
goto err_rm_root_bus; |
||||
} |
||||
|
||||
iproc_pcie_enable(pcie); |
||||
|
||||
pci_scan_child_bus(bus); |
||||
pci_assign_unassigned_bus_resources(bus); |
||||
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); |
||||
pci_bus_add_devices(bus); |
||||
|
||||
return 0; |
||||
|
||||
err_rm_root_bus: |
||||
pci_stop_root_bus(bus); |
||||
pci_remove_root_bus(bus); |
||||
|
||||
err_power_off_phy: |
||||
if (pcie->phy) |
||||
phy_power_off(pcie->phy); |
||||
err_exit_phy: |
||||
if (pcie->phy) |
||||
phy_exit(pcie->phy); |
||||
|
||||
return ret; |
||||
} |
||||
EXPORT_SYMBOL(iproc_pcie_setup); |
||||
|
||||
int iproc_pcie_remove(struct iproc_pcie *pcie) |
||||
{ |
||||
pci_stop_root_bus(pcie->root_bus); |
||||
pci_remove_root_bus(pcie->root_bus); |
||||
|
||||
if (pcie->phy) { |
||||
phy_power_off(pcie->phy); |
||||
phy_exit(pcie->phy); |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
EXPORT_SYMBOL(iproc_pcie_remove); |
||||
|
||||
MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>"); |
||||
MODULE_DESCRIPTION("Broadcom iPROC PCIe common driver"); |
||||
MODULE_LICENSE("GPL v2"); |
||||
@ -0,0 +1,42 @@ |
||||
/*
|
||||
* Copyright (C) 2014-2015 Broadcom Corporation |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation version 2. |
||||
* |
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any |
||||
* kind, whether express or implied; without even the implied warranty |
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
*/ |
||||
|
||||
#ifndef _PCIE_IPROC_H |
||||
#define _PCIE_IPROC_H |
||||
|
||||
#define IPROC_PCIE_MAX_NUM_IRQS 6 |
||||
|
||||
/**
|
||||
* iProc PCIe device |
||||
* @dev: pointer to device data structure |
||||
* @base: PCIe host controller I/O register base |
||||
* @resources: linked list of all PCI resources |
||||
* @sysdata: Per PCI controller data |
||||
* @root_bus: pointer to root bus |
||||
* @phy: optional PHY device that controls the Serdes |
||||
* @irqs: interrupt IDs |
||||
*/ |
||||
struct iproc_pcie { |
||||
struct device *dev; |
||||
void __iomem *base; |
||||
struct list_head *resources; |
||||
struct pci_sys_data sysdata; |
||||
struct pci_bus *root_bus; |
||||
struct phy *phy; |
||||
int irqs[IPROC_PCIE_MAX_NUM_IRQS]; |
||||
}; |
||||
|
||||
int iproc_pcie_setup(struct iproc_pcie *pcie); |
||||
int iproc_pcie_remove(struct iproc_pcie *pcie); |
||||
|
||||
#endif /* _PCIE_IPROC_H */ |
||||
Loading…
Reference in new issue