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ARM: dts: Add NFC device node for SDM429W

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Device node changes required on SDM429W describing
the GPIO configuration for Nfc controller chip.
Modified corresponding Nfc device node for
internal platforms.

Change-Id: I8a2044359b9c817faec2922540727a2accb8df9c
Signed-off-by: Tapas Dey <tdey@codeaurora.org>
tirimbino
Tapas Dey 5 years ago
parent 0151f537f0
commit 3b4cd9f2f8
9 changed files with 217 additions and 0 deletions
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  1. 1
      arch/arm64/boot/dts/qcom/sda429-bg-dvt2-wtp-overlay.dts
  2. 37
      arch/arm64/boot/dts/qcom/sda429-bg-dvt2-wtp.dtsi
  3. 1
      arch/arm64/boot/dts/qcom/sda429-wtp-overlay.dts
  4. 37
      arch/arm64/boot/dts/qcom/sda429-wtp.dtsi
  5. 1
      arch/arm64/boot/dts/qcom/sdm429-bg-dvt2-wtp-overlay.dts
  6. 37
      arch/arm64/boot/dts/qcom/sdm429-bg-dvt2-wtp.dtsi
  7. 65
      arch/arm64/boot/dts/qcom/sdm429-pinctrl.dtsi
  8. 1
      arch/arm64/boot/dts/qcom/sdm429-wtp-overlay.dts
  9. 37
      arch/arm64/boot/dts/qcom/sdm429-wtp.dtsi

1
arch/arm64/boot/dts/qcom/sda429-bg-dvt2-wtp-overlay.dts
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@ -14,6 +14,7 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sda429-bg-dvt2-wtp.dtsi"
/ {

37
arch/arm64/boot/dts/qcom/sda429-bg-dvt2-wtp.dtsi
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@ -52,3 +52,40 @@
status = "disabled";
};
&pm660_gpios {
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
&i2c_5 { /* BLSP2 QUP1 (NFC) */
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 17 0x00>;
qcom,nq-ven = <&tlmm 16 0x00>;
qcom,nq-firm = <&tlmm 130 0x00>;
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 93 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK2";
interrupts = <17 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_disable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
clocks = <&rpmcc RPM_SMD_BB_CLK2_PIN>;
clock-names = "ref_clk";
};
};

1
arch/arm64/boot/dts/qcom/sda429-wtp-overlay.dts
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@ -14,6 +14,7 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sda429-wtp.dtsi"
/ {

37
arch/arm64/boot/dts/qcom/sda429-wtp.dtsi
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@ -52,3 +52,40 @@
status = "disabled";
};
&pm660_gpios {
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
&i2c_5 { /* BLSP2 QUP1 (NFC) */
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 17 0x00>;
qcom,nq-ven = <&tlmm 16 0x00>;
qcom,nq-firm = <&tlmm 130 0x00>;
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 93 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK2";
interrupts = <17 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_disable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
clocks = <&rpmcc RPM_SMD_BB_CLK2_PIN>;
clock-names = "ref_clk";
};
};

1
arch/arm64/boot/dts/qcom/sdm429-bg-dvt2-wtp-overlay.dts
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@ -14,6 +14,7 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sdm429-bg-dvt2-wtp.dtsi"
/ {

37
arch/arm64/boot/dts/qcom/sdm429-bg-dvt2-wtp.dtsi
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@ -52,3 +52,40 @@
status = "disabled";
};
&pm660_gpios {
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
&i2c_5 { /* BLSP2 QUP1 (NFC) */
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 17 0x00>;
qcom,nq-ven = <&tlmm 16 0x00>;
qcom,nq-firm = <&tlmm 130 0x00>;
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 93 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK2";
interrupts = <17 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_disable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
clocks = <&rpmcc RPM_SMD_BB_CLK2_PIN>;
clock-names = "ref_clk";
};
};

65
arch/arm64/boot/dts/qcom/sdm429-pinctrl.dtsi
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@ -352,6 +352,71 @@
};
};
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* GPIO 17 NFC Read Interrupt */
pins = "gpio17";
function = "gpio";
};
config {
pins = "gpio17";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* GPIO 17 NFC Read Interrupt */
pins = "gpio17";
function = "gpio";
};
config {
pins = "gpio17";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_disable_active: nfc_disable_active {
/* active state */
mux {
/* 16: NFC ENABLE 130: FW DNLD */
/* 93: ESE Enable */
pins = "gpio16", "gpio130", "gpio93";
function = "gpio";
};
config {
pins = "gpio16", "gpio130", "gpio93";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_disable_suspend: nfc_disable_suspend {
/* sleep state */
mux {
/* 16: NFC ENABLE 130: FW DNLD */
/* 93: ESE Enable */
pins = "gpio16", "gpio130", "gpio93";
function = "gpio";
};
config {
pins = "gpio16", "gpio130", "gpio93";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
i2c_6{
i2c_6_active: i2c_6_active {
mux {

1
arch/arm64/boot/dts/qcom/sdm429-wtp-overlay.dts
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@ -14,6 +14,7 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "sdm429-wtp.dtsi"
#include "sdm429-mdss-panels.dtsi"

37
arch/arm64/boot/dts/qcom/sdm429-wtp.dtsi
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@ -52,3 +52,40 @@
status = "disabled";
};
&pm660_gpios {
nfc_clk {
nfc_clk_default: nfc_clk_default {
pins = "gpio4";
function = "normal";
input-enable;
power-source = <1>;
};
};
};
&i2c_5 { /* BLSP2 QUP1 (NFC) */
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 17 0x00>;
qcom,nq-ven = <&tlmm 16 0x00>;
qcom,nq-firm = <&tlmm 130 0x00>;
qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
qcom,nq-esepwr = <&tlmm 93 0x00>;
interrupt-parent = <&tlmm>;
qcom,clk-src = "BBCLK2";
interrupts = <17 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_disable_active
&nfc_clk_default>;
pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
clocks = <&rpmcc RPM_SMD_BB_CLK2_PIN>;
clock-names = "ref_clk";
};
};

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