Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM) binding doc. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Bai Ping <ping.bai@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>tirimbino
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NXP Low Power Timer/Pulse Width Modulation Module (TPM) |
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The Timer/PWM Module (TPM) supports input capture, output compare, |
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and the generation of PWM signals to control electric motor and power |
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management applications. The counter, compare and capture registers |
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are clocked by an asynchronous clock that can remain enabled in low |
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power modes. TPM can support global counter bus where one TPM drives |
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the counter bus for the others, provided bit width is the same. |
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Required properties: |
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- compatible : should be "fsl,imx7ulp-tpm" |
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- reg : Specifies base physical address and size of the register sets |
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for the clock event device and clock source device. |
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- interrupts : Should be the clock event device interrupt. |
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- clocks : The clocks provided by the SoC to drive the timer, must contain |
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an entry for each entry in clock-names. |
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- clock-names : Must include the following entries: "igp" and "per". |
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Example: |
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tpm5: tpm@40260000 { |
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compatible = "fsl,imx7ulp-tpm"; |
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reg = <0x40260000 0x1000>; |
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interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>, |
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<&clks IMX7ULP_CLK_LPTPM5>; |
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clock-names = "ipg", "per"; |
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}; |
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