These will be replaced in the near future, the code isn't yet stable enough for this merge window however. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>tirimbino
Ben Skeggs
13 years ago
parent
ce22af03da
commit
2a259a3d84
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/*
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* Copyright 2012 Red Hat Inc. |
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* |
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* Permission is hereby granted, free of charge, to any person obtaining a |
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* copy of this software and associated documentation files (the "Software"), |
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* to deal in the Software without restriction, including without limitation |
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* the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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* and/or sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be included in |
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* all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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* |
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*/ |
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#include "drmP.h" |
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#include "nouveau_drv.h" |
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#include "nouveau_dma.h" |
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#include "nouveau_abi16.h" |
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#include "nouveau_ramht.h" |
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#include "nouveau_software.h" |
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int |
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nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_private *dev_priv = dev->dev_private; |
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struct drm_nouveau_getparam *getparam = data; |
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switch (getparam->param) { |
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case NOUVEAU_GETPARAM_CHIPSET_ID: |
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getparam->value = dev_priv->chipset; |
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break; |
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case NOUVEAU_GETPARAM_PCI_VENDOR: |
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getparam->value = dev->pci_vendor; |
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break; |
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case NOUVEAU_GETPARAM_PCI_DEVICE: |
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getparam->value = dev->pci_device; |
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break; |
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case NOUVEAU_GETPARAM_BUS_TYPE: |
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if (drm_pci_device_is_agp(dev)) |
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getparam->value = 0; |
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else |
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if (!pci_is_pcie(dev->pdev)) |
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getparam->value = 1; |
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else |
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getparam->value = 2; |
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break; |
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case NOUVEAU_GETPARAM_FB_SIZE: |
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getparam->value = dev_priv->fb_available_size; |
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break; |
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case NOUVEAU_GETPARAM_AGP_SIZE: |
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getparam->value = dev_priv->gart_info.aper_size; |
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break; |
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case NOUVEAU_GETPARAM_VM_VRAM_BASE: |
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getparam->value = 0; /* deprecated */ |
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break; |
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case NOUVEAU_GETPARAM_PTIMER_TIME: |
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getparam->value = dev_priv->engine.timer.read(dev); |
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break; |
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case NOUVEAU_GETPARAM_HAS_BO_USAGE: |
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getparam->value = 1; |
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break; |
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case NOUVEAU_GETPARAM_HAS_PAGEFLIP: |
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getparam->value = 1; |
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break; |
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case NOUVEAU_GETPARAM_GRAPH_UNITS: |
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/* NV40 and NV50 versions are quite different, but register
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* address is the same. User is supposed to know the card |
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* family anyway... */ |
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if (dev_priv->chipset >= 0x40) { |
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getparam->value = nv_rd32(dev, NV40_PMC_GRAPH_UNITS); |
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break; |
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} |
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/* FALLTHRU */ |
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default: |
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NV_DEBUG(dev, "unknown parameter %lld\n", getparam->param); |
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return -EINVAL; |
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} |
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return 0; |
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} |
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int |
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nouveau_abi16_ioctl_setparam(ABI16_IOCTL_ARGS) |
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{ |
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return -EINVAL; |
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} |
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int |
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nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_private *dev_priv = dev->dev_private; |
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struct drm_nouveau_channel_alloc *init = data; |
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struct nouveau_channel *chan; |
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int ret; |
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if (!dev_priv->eng[NVOBJ_ENGINE_GR]) |
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return -ENODEV; |
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if (init->fb_ctxdma_handle == ~0 || init->tt_ctxdma_handle == ~0) |
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return -EINVAL; |
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ret = nouveau_channel_alloc(dev, &chan, file_priv, |
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init->fb_ctxdma_handle, |
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init->tt_ctxdma_handle); |
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if (ret) |
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return ret; |
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init->channel = chan->id; |
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if (nouveau_vram_pushbuf == 0) { |
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if (chan->dma.ib_max) |
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init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM | |
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NOUVEAU_GEM_DOMAIN_GART; |
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else if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_VRAM) |
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init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM; |
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else |
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init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_GART; |
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} else { |
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init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_VRAM; |
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} |
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if (dev_priv->card_type < NV_C0) { |
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init->subchan[0].handle = 0x00000000; |
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init->subchan[0].grclass = 0x0000; |
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init->subchan[1].handle = NvSw; |
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init->subchan[1].grclass = NV_SW; |
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init->nr_subchan = 2; |
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} |
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/* Named memory object area */ |
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ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem, |
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&init->notifier_handle); |
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if (ret == 0) |
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atomic_inc(&chan->users); /* userspace reference */ |
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nouveau_channel_put(&chan); |
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return ret; |
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} |
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int |
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nouveau_abi16_ioctl_channel_free(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_channel_free *req = data; |
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struct nouveau_channel *chan; |
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chan = nouveau_channel_get(file_priv, req->channel); |
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if (IS_ERR(chan)) |
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return PTR_ERR(chan); |
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list_del(&chan->list); |
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atomic_dec(&chan->users); |
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nouveau_channel_put(&chan); |
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return 0; |
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} |
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int |
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nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_grobj_alloc *init = data; |
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struct nouveau_channel *chan; |
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int ret; |
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if (init->handle == ~0) |
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return -EINVAL; |
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/* compatibility with userspace that assumes 506e for all chipsets */ |
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if (init->class == 0x506e) { |
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init->class = nouveau_software_class(dev); |
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if (init->class == 0x906e) |
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return 0; |
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} else |
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if (init->class == 0x906e) { |
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NV_ERROR(dev, "906e not supported yet\n"); |
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return -EINVAL; |
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} |
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chan = nouveau_channel_get(file_priv, init->channel); |
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if (IS_ERR(chan)) |
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return PTR_ERR(chan); |
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if (nouveau_ramht_find(chan, init->handle)) { |
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ret = -EEXIST; |
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goto out; |
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} |
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ret = nouveau_gpuobj_gr_new(chan, init->handle, init->class); |
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if (ret) { |
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NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", |
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ret, init->channel, init->handle); |
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} |
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out: |
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nouveau_channel_put(&chan); |
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return ret; |
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} |
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int |
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nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_private *dev_priv = dev->dev_private; |
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struct drm_nouveau_notifierobj_alloc *na = data; |
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struct nouveau_channel *chan; |
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int ret; |
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/* completely unnecessary for these chipsets... */ |
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if (unlikely(dev_priv->card_type >= NV_C0)) |
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return -EINVAL; |
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chan = nouveau_channel_get(file_priv, na->channel); |
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if (IS_ERR(chan)) |
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return PTR_ERR(chan); |
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ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000, |
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&na->offset); |
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nouveau_channel_put(&chan); |
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return ret; |
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} |
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int |
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nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS) |
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{ |
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struct drm_nouveau_gpuobj_free *objfree = data; |
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struct nouveau_channel *chan; |
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int ret; |
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chan = nouveau_channel_get(file_priv, objfree->channel); |
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if (IS_ERR(chan)) |
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return PTR_ERR(chan); |
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/* Synchronize with the user channel */ |
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nouveau_channel_idle(chan); |
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ret = nouveau_ramht_remove(chan, objfree->handle); |
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nouveau_channel_put(&chan); |
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return ret; |
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} |
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@ -0,0 +1,83 @@ |
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#ifndef __NOUVEAU_ABI16_H__ |
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#define __NOUVEAU_ABI16_H__ |
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#define ABI16_IOCTL_ARGS \ |
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struct drm_device *dev, void *data, struct drm_file *file_priv |
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int nouveau_abi16_ioctl_getparam(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_setparam(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_channel_free(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS); |
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int nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS); |
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struct drm_nouveau_channel_alloc { |
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uint32_t fb_ctxdma_handle; |
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uint32_t tt_ctxdma_handle; |
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int channel; |
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uint32_t pushbuf_domains; |
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/* Notifier memory */ |
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uint32_t notifier_handle; |
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/* DRM-enforced subchannel assignments */ |
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struct { |
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uint32_t handle; |
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uint32_t grclass; |
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} subchan[8]; |
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uint32_t nr_subchan; |
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}; |
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struct drm_nouveau_channel_free { |
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int channel; |
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}; |
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struct drm_nouveau_grobj_alloc { |
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int channel; |
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uint32_t handle; |
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int class; |
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}; |
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struct drm_nouveau_notifierobj_alloc { |
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uint32_t channel; |
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uint32_t handle; |
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uint32_t size; |
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uint32_t offset; |
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}; |
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struct drm_nouveau_gpuobj_free { |
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int channel; |
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uint32_t handle; |
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}; |
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#define NOUVEAU_GETPARAM_PCI_VENDOR 3 |
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#define NOUVEAU_GETPARAM_PCI_DEVICE 4 |
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#define NOUVEAU_GETPARAM_BUS_TYPE 5 |
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#define NOUVEAU_GETPARAM_FB_SIZE 8 |
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#define NOUVEAU_GETPARAM_AGP_SIZE 9 |
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#define NOUVEAU_GETPARAM_CHIPSET_ID 11 |
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#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12 |
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#define NOUVEAU_GETPARAM_GRAPH_UNITS 13 |
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#define NOUVEAU_GETPARAM_PTIMER_TIME 14 |
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#define NOUVEAU_GETPARAM_HAS_BO_USAGE 15 |
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#define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16 |
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struct drm_nouveau_getparam { |
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uint64_t param; |
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uint64_t value; |
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}; |
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struct drm_nouveau_setparam { |
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uint64_t param; |
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uint64_t value; |
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}; |
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#define DRM_IOCTL_NOUVEAU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GETPARAM, struct drm_nouveau_getparam) |
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#define DRM_IOCTL_NOUVEAU_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SETPARAM, struct drm_nouveau_setparam) |
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#define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_ALLOC, struct drm_nouveau_channel_alloc) |
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#define DRM_IOCTL_NOUVEAU_CHANNEL_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_FREE, struct drm_nouveau_channel_free) |
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#define DRM_IOCTL_NOUVEAU_GROBJ_ALLOC DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GROBJ_ALLOC, struct drm_nouveau_grobj_alloc) |
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#define DRM_IOCTL_NOUVEAU_NOTIFIEROBJ_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, struct drm_nouveau_notifierobj_alloc) |
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#define DRM_IOCTL_NOUVEAU_GPUOBJ_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GPUOBJ_FREE, struct drm_nouveau_gpuobj_free) |
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#endif |
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