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drm/exynos: pass struct exynos_drm_plane in update/enable

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We already have the plane pointer in before calling .update_plane() or
disable_plane() so pass it directly to those calls avoiding a new
conversion from zpos to struct exynos_drm_plane.

v2: don't remove check for suspended in FIMD (comment by Joonyoung)

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
tirimbino
Gustavo Padovan 10 years ago committed by Inki Dae
parent 9cc7610a23
commit 1e1d139322
7 changed files with 40 additions and 65 deletions
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  1. 22
      drivers/gpu/drm/exynos/exynos5433_drm_decon.c
  2. 22
      drivers/gpu/drm/exynos/exynos7_drm_decon.c
  3. 6
      drivers/gpu/drm/exynos/exynos_drm_drv.h
  4. 22
      drivers/gpu/drm/exynos/exynos_drm_fimd.c
  5. 4
      drivers/gpu/drm/exynos/exynos_drm_plane.c
  6. 9
      drivers/gpu/drm/exynos/exynos_drm_vidi.c
  7. 20
      drivers/gpu/drm/exynos/exynos_mixer.c

22
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
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@ -219,17 +219,13 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win,
writel(val, ctx->addr + DECON_SHADOWCON);
}
static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void decon_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct decon_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
unsigned int win = plane->zpos;
u32 val;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
if (ctx->suspended)
return;
@ -277,17 +273,13 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
atomic_set(&ctx->win_updated, 1);
}
static void decon_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void decon_disable_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct decon_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
unsigned int win = plane->zpos;
u32 val;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
if (ctx->suspended)
return;
@ -378,7 +370,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
* a destroyed buffer later.
*/
for (i = 0; i < WINDOWS_NR; i++)
decon_disable_plane(crtc, i);
decon_disable_plane(crtc, &ctx->planes[i]);
decon_swreset(ctx);

22
drivers/gpu/drm/exynos/exynos7_drm_decon.c
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@ -383,24 +383,20 @@ static void decon_shadow_protect_win(struct decon_context *ctx,
writel(val, ctx->regs + SHADOWCON);
}
static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void decon_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct decon_context *ctx = crtc->ctx;
struct drm_display_mode *mode = &crtc->base.state->adjusted_mode;
struct exynos_drm_plane *plane;
int padding;
unsigned long val, alpha;
unsigned int last_x;
unsigned int last_y;
unsigned int win = plane->zpos;
if (ctx->suspended)
return;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
/*
* SHADOWCON/PRTCON register is used for enabling timing.
*
@ -493,17 +489,13 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
writel(val, ctx->regs + DECON_UPDATE);
}
static void decon_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void decon_disable_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct decon_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
unsigned int win = plane->zpos;
u32 val;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
if (ctx->suspended)
return;
@ -599,7 +591,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
* a destroyed buffer later.
*/
for (i = 0; i < WINDOWS_NR; i++)
decon_disable_plane(crtc, i);
decon_disable_plane(crtc, &ctx->planes[i]);
clk_disable_unprepare(ctx->vclk);
clk_disable_unprepare(ctx->eclk);

6
drivers/gpu/drm/exynos/exynos_drm_drv.h
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@ -173,8 +173,10 @@ struct exynos_drm_crtc_ops {
int (*enable_vblank)(struct exynos_drm_crtc *crtc);
void (*disable_vblank)(struct exynos_drm_crtc *crtc);
void (*wait_for_vblank)(struct exynos_drm_crtc *crtc);
void (*update_plane)(struct exynos_drm_crtc *crtc, unsigned int zpos);
void (*disable_plane)(struct exynos_drm_crtc *crtc, unsigned int zpos);
void (*update_plane)(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane);
void (*disable_plane)(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane);
void (*te_handler)(struct exynos_drm_crtc *crtc);
void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable);
};

22
drivers/gpu/drm/exynos/exynos_drm_fimd.c
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@ -607,22 +607,18 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx,
writel(val, ctx->regs + reg);
}
static void fimd_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void fimd_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct fimd_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
dma_addr_t dma_addr;
unsigned long val, size, offset;
unsigned int last_x, last_y, buf_offsize, line_size;
unsigned int win = plane->zpos;
if (ctx->suspended)
return;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
/*
* SHADOWCON/PRTCON register is used for enabling timing.
*
@ -715,15 +711,11 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
atomic_set(&ctx->win_updated, 1);
}
static void fimd_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void fimd_disable_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct fimd_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
unsigned int win = plane->zpos;
if (ctx->suspended)
return;
@ -785,7 +777,7 @@ static void fimd_disable(struct exynos_drm_crtc *crtc)
* a destroyed buffer later.
*/
for (i = 0; i < WINDOWS_NR; i++)
fimd_disable_plane(crtc, i);
fimd_disable_plane(crtc, &ctx->planes[i]);
fimd_enable_vblank(crtc);
fimd_wait_for_vblank(crtc);

4
drivers/gpu/drm/exynos/exynos_drm_plane.c
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@ -180,7 +180,7 @@ static void exynos_plane_atomic_update(struct drm_plane *plane,
state->src_w >> 16, state->src_h >> 16);
if (exynos_crtc->ops->update_plane)
exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane->zpos);
exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
}
static void exynos_plane_atomic_disable(struct drm_plane *plane,
@ -194,7 +194,7 @@ static void exynos_plane_atomic_disable(struct drm_plane *plane,
if (exynos_crtc->ops->disable_plane)
exynos_crtc->ops->disable_plane(exynos_crtc,
exynos_plane->zpos);
exynos_plane);
}
static const struct drm_plane_helper_funcs plane_helper_funcs = {

9
drivers/gpu/drm/exynos/exynos_drm_vidi.c
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@ -118,19 +118,14 @@ static void vidi_disable_vblank(struct exynos_drm_crtc *crtc)
ctx->vblank_on = false;
}
static void vidi_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void vidi_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct vidi_context *ctx = crtc->ctx;
struct exynos_drm_plane *plane;
if (ctx->suspended)
return;
if (win < 0 || win >= WINDOWS_NR)
return;
plane = &ctx->planes[win];
DRM_DEBUG_KMS("dma_addr = %pad\n", plane->dma_addr);
if (ctx->vblank_on)

20
drivers/gpu/drm/exynos/exynos_mixer.c
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@ -927,28 +927,30 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc)
mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);
}
static void mixer_update_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void mixer_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct mixer_context *mixer_ctx = crtc->ctx;
DRM_DEBUG_KMS("win: %d\n", win);
DRM_DEBUG_KMS("win: %d\n", plane->zpos);
if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
return;
if (win > 1 && mixer_ctx->vp_enabled)
vp_video_buffer(mixer_ctx, win);
if (plane->zpos > 1 && mixer_ctx->vp_enabled)
vp_video_buffer(mixer_ctx, plane->zpos);
else
mixer_graph_buffer(mixer_ctx, win);
mixer_graph_buffer(mixer_ctx, plane->zpos);
}
static void mixer_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win)
static void mixer_disable_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane *plane)
{
struct mixer_context *mixer_ctx = crtc->ctx;
struct mixer_resources *res = &mixer_ctx->mixer_res;
unsigned long flags;
DRM_DEBUG_KMS("win: %d\n", win);
DRM_DEBUG_KMS("win: %d\n", plane->zpos);
if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags))
return;
@ -956,7 +958,7 @@ static void mixer_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win)
spin_lock_irqsave(&res->reg_slock, flags);
mixer_vsync_set_update(mixer_ctx, false);
mixer_cfg_layer(mixer_ctx, win, false);
mixer_cfg_layer(mixer_ctx, plane->zpos, false);
mixer_vsync_set_update(mixer_ctx, true);
spin_unlock_irqrestore(&res->reg_slock, flags);
@ -1053,7 +1055,7 @@ static void mixer_disable(struct exynos_drm_crtc *crtc)
mixer_regs_dump(ctx);
for (i = 0; i < MIXER_WIN_NR; i++)
mixer_disable_plane(crtc, i);
mixer_disable_plane(crtc, &ctx->planes[i]);
clear_bit(MXR_BIT_POWERED, &ctx->flags);

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