This change adds USB controller and USB PHYs related configuration for USB functionality on sdxprairie. Change-Id: Iee79225c08267bc9fa1abf3ae95e73c71755061d Signed-off-by: Mayank Rana <mrana@codeaurora.org>tirimbino
Mayank Rana
7 years ago
parent
51683be8d3
commit
1daa160bbf
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 and |
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* only version 2 as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#include <dt-bindings/clock/qcom,gcc-sdxprairie.h> |
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#include <dt-bindings/msm/msm-bus-ids.h> |
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&soc { |
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usb: ssusb@a600000 { |
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compatible = "qcom,dwc-usb3-msm"; |
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reg = <0x0a600000 0x100000>; |
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reg-names = "core_base"; |
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iommus = <&apps_smmu 0x1a0 0x0>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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interrupts = <0 157 0>, <0 130 0>, <0 158 0>; |
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interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", |
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"dm_hs_phy_irq"; |
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USB3_GDSC-supply = <&gdsc_usb30>; |
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clocks = <&clock_gcc GCC_USB30_MASTER_CLK>, |
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<&clock_gcc GCC_USB30_SLV_AHB_CLK>, |
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<&clock_gcc GCC_USB30_MSTR_AXI_CLK>, |
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<&clock_gcc GCC_USB30_MOCK_UTMI_CLK>, |
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<&clock_gcc GCC_USB30_SLEEP_CLK>, |
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<&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>; |
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clock-names = "core_clk", "iface_clk", "bus_aggr_clk", |
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"utmi_clk", "sleep_clk", "xo"; |
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resets = <&clock_gcc GCC_USB30_BCR>; |
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reset-names = "core_reset"; |
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qcom,core-clk-rate = <200000000>; |
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qcom,core-clk-rate-hs = <66666667>; |
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qcom,num-gsi-evt-buffs = <0x3>; |
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qcom,gsi-reg-offset = |
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<0x0fc /* GSI_GENERAL_CFG */ |
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0x208 /* GSI_DBL_ADDR_L */ |
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0x224 /* GSI_DBL_ADDR_H */ |
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0x240 /* GSI_RING_BASE_ADDR_L */ |
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0x25c /* GSI_RING_BASE_ADDR_H */ |
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0x1a4>; /* GSI_IF_STS */ |
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qcom,dwc-usb3-msm-tx-fifo-size = <27696>; |
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qcom,msm-bus,name = "usb"; |
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qcom,msm-bus,num-cases = <3>; |
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qcom,msm-bus,num-paths = <3>; |
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qcom,msm-bus,vectors-KBps = |
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/* suspend vote */ |
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<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 0 0>, |
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<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 0>, |
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<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 0>, |
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/* nominal vote */ |
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<MSM_BUS_MASTER_USB3 |
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MSM_BUS_SLAVE_EBI_CH0 1000000 2500000>, |
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<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, |
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<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>, |
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/* svs vote */ |
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<MSM_BUS_MASTER_USB3 |
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MSM_BUS_SLAVE_EBI_CH0 240000 700000>, |
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<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>, |
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<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>; |
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dwc3@a600000 { |
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compatible = "snps,dwc3"; |
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reg = <0x0a600000 0xcd00>; |
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interrupts = <0 133 0>; |
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linux,sysdev_is_parent; |
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snps,disable-clk-gating; |
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snps,has-lpm-erratum; |
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snps,hird-threshold = /bits/ 8 <0x10>; |
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snps,ssp-u3-u0-quirk; |
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snps,usb3-u1u2-disable; |
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usb-core-id = <0>; |
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tx-fifo-resize; |
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maximum-speed = "super-speed-plus"; |
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dr_mode = "otg"; |
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}; |
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qcom,usbbam@a704000 { |
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compatible = "qcom,usb-bam-msm"; |
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reg = <0xa704000 0x17000>; |
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interrupts = <0 132 0>; |
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qcom,usb-bam-fifo-baseaddr = <0x146bb000>; |
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qcom,usb-bam-num-pipes = <4>; |
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qcom,disable-clk-gating; |
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qcom,usb-bam-override-threshold = <0x4001>; |
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qcom,usb-bam-max-mbps-highspeed = <400>; |
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qcom,usb-bam-max-mbps-superspeed = <3600>; |
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qcom,reset-bam-on-connect; |
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qcom,pipe0 { |
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label = "ssusb-qdss-in-0"; |
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qcom,usb-bam-mem-type = <2>; |
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qcom,dir = <1>; |
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qcom,pipe-num = <0>; |
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qcom,peer-bam = <0>; |
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qcom,peer-bam-physical-address = <0x6064000>; |
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qcom,src-bam-pipe-index = <0>; |
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qcom,dst-bam-pipe-index = <0>; |
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qcom,data-fifo-offset = <0x0>; |
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qcom,data-fifo-size = <0x1800>; |
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qcom,descriptor-fifo-offset = <0x1800>; |
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qcom,descriptor-fifo-size = <0x800>; |
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}; |
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}; |
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}; |
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usb_nop_phy: usb_nop_phy { |
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compatible = "usb-nop-xceiv"; |
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}; |
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}; |
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