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@ -732,7 +732,7 @@ static int polaris10_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, |
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table->Smio[level] |= |
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data->mvdd_voltage_table.entries[level].smio_low; |
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} |
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table->SmioMask2 = data->vddci_voltage_table.mask_low; |
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table->SmioMask2 = data->mvdd_voltage_table.mask_low; |
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table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count); |
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} |
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@ -1422,22 +1422,19 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, |
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table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; |
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if (!data->sclk_dpm_key_disabled) { |
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/* Get MinVoltage and Frequency from DPM0,
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* already converted to SMC_UL */ |
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sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value; |
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result = polaris10_get_dependency_volt_by_clk(hwmgr, |
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table_info->vdd_dep_on_sclk, |
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table->ACPILevel.SclkFrequency, |
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&table->ACPILevel.MinVoltage, &mvdd); |
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PP_ASSERT_WITH_CODE((0 == result), |
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"Cannot find ACPI VDDC voltage value " |
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"in Clock Dependency Table", ); |
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} else { |
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sclk_frequency = data->vbios_boot_state.sclk_bootup_value; |
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table->ACPILevel.MinVoltage = |
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data->vbios_boot_state.vddc_bootup_value * VOLTAGE_SCALE; |
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} |
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/* Get MinVoltage and Frequency from DPM0,
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* already converted to SMC_UL */ |
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sclk_frequency = data->dpm_table.sclk_table.dpm_levels[0].value; |
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result = polaris10_get_dependency_volt_by_clk(hwmgr, |
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table_info->vdd_dep_on_sclk, |
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sclk_frequency, |
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&table->ACPILevel.MinVoltage, &mvdd); |
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PP_ASSERT_WITH_CODE((0 == result), |
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"Cannot find ACPI VDDC voltage value " |
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"in Clock Dependency Table", |
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); |
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result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); |
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PP_ASSERT_WITH_CODE(result == 0, "Error retrieving Engine Clock dividers from VBIOS.", return result); |
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@ -1462,24 +1459,18 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, |
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CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Fcw1_frac); |
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CONVERT_FROM_HOST_TO_SMC_US(table->ACPILevel.SclkSetting.Sclk_ss_slew_rate); |
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if (!data->mclk_dpm_key_disabled) { |
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/* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */ |
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table->MemoryACPILevel.MclkFrequency = |
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data->dpm_table.mclk_table.dpm_levels[0].value; |
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result = polaris10_get_dependency_volt_by_clk(hwmgr, |
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table_info->vdd_dep_on_mclk, |
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table->MemoryACPILevel.MclkFrequency, |
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&table->MemoryACPILevel.MinVoltage, &mvdd); |
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PP_ASSERT_WITH_CODE((0 == result), |
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"Cannot find ACPI VDDCI voltage value " |
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"in Clock Dependency Table", |
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); |
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} else { |
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table->MemoryACPILevel.MclkFrequency = |
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data->vbios_boot_state.mclk_bootup_value; |
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table->MemoryACPILevel.MinVoltage = |
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data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE; |
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} |
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/* Get MinVoltage and Frequency from DPM0, already converted to SMC_UL */ |
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table->MemoryACPILevel.MclkFrequency = |
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data->dpm_table.mclk_table.dpm_levels[0].value; |
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result = polaris10_get_dependency_volt_by_clk(hwmgr, |
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table_info->vdd_dep_on_mclk, |
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table->MemoryACPILevel.MclkFrequency, |
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&table->MemoryACPILevel.MinVoltage, &mvdd); |
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PP_ASSERT_WITH_CODE((0 == result), |
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"Cannot find ACPI VDDCI voltage value " |
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"in Clock Dependency Table", |
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); |
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us_mvdd = 0; |
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if ((POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control) || |
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@ -1524,6 +1515,7 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr, |
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struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = |
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table_info->mm_dep_table; |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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uint32_t vddci; |
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table->VceLevelCount = (uint8_t)(mm_table->count); |
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table->VceBootLevel = 0; |
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@ -1533,9 +1525,18 @@ static int polaris10_populate_smc_vce_level(struct pp_hwmgr *hwmgr, |
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table->VceLevel[count].MinVoltage = 0; |
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table->VceLevel[count].MinVoltage |= |
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(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; |
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if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) |
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vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), |
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mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); |
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else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) |
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vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; |
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else |
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vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->VceLevel[count].MinVoltage |= |
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((mm_table->entries[count].vddc - data->vddc_vddci_delta) * |
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VOLTAGE_SCALE) << VDDCI_SHIFT; |
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(vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->VceLevel[count].MinVoltage |= 1 << PHASES_SHIFT; |
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/*retrieve divider value for VBIOS */ |
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@ -1564,6 +1565,7 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr, |
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struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = |
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table_info->mm_dep_table; |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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uint32_t vddci; |
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table->SamuBootLevel = 0; |
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table->SamuLevelCount = (uint8_t)(mm_table->count); |
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@ -1574,8 +1576,16 @@ static int polaris10_populate_smc_samu_level(struct pp_hwmgr *hwmgr, |
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table->SamuLevel[count].Frequency = mm_table->entries[count].samclock; |
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table->SamuLevel[count].MinVoltage |= (mm_table->entries[count].vddc * |
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VOLTAGE_SCALE) << VDDC_SHIFT; |
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table->SamuLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - |
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data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) |
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vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), |
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mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); |
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else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) |
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vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; |
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else |
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vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->SamuLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->SamuLevel[count].MinVoltage |= 1 << PHASES_SHIFT; |
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/* retrieve divider value for VBIOS */ |
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@ -1658,6 +1668,7 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, |
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struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = |
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table_info->mm_dep_table; |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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uint32_t vddci; |
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table->UvdLevelCount = (uint8_t)(mm_table->count); |
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table->UvdBootLevel = 0; |
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@ -1668,8 +1679,16 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, |
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table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk; |
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table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * |
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VOLTAGE_SCALE) << VDDC_SHIFT; |
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table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - |
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data->vddc_vddci_delta) * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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if (POLARIS10_VOLTAGE_CONTROL_BY_GPIO == data->vddci_control) |
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vddci = (uint32_t)phm_find_closest_vddci(&(data->vddci_voltage_table), |
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mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); |
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else if (POLARIS10_VOLTAGE_CONTROL_BY_SVID2 == data->vddci_control) |
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vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; |
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else |
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vddci = (data->vbios_boot_state.vddci_bootup_value * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->UvdLevel[count].MinVoltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; |
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table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT; |
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/* retrieve divider value for VBIOS */ |
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@ -1690,8 +1709,8 @@ static int polaris10_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, |
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CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency); |
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CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency); |
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CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage); |
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} |
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return result; |
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} |
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@ -1791,20 +1810,26 @@ static int polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) |
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for (i = 0; i < sclk_table->count; i++) { |
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data->smc_state_table.Sclk_CKS_masterEn0_7 |= |
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sclk_table->entries[i].cks_enable << i; |
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volt_without_cks = (uint32_t)(((ro - 40) * 1000 - 2753594 - sclk_table->entries[i].clk/100 * 136418 /1000) / \
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(sclk_table->entries[i].clk/100 * 1132925 /10000 - 242418)/100); |
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volt_with_cks = (uint32_t)((ro * 1000 -2396351 - sclk_table->entries[i].clk/100 * 329021/1000) / \
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(sclk_table->entries[i].clk/10000 * 649434 /1000 - 18005)/10); |
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if (hwmgr->chip_id == CHIP_POLARIS10) { |
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volt_without_cks = (uint32_t)((2753594000U + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \
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(2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000)); |
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volt_with_cks = (uint32_t)((2797202000U + sclk_table->entries[i].clk/100 * 3232 - (ro - 65) * 1000000) / \
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(2522480 - sclk_table->entries[i].clk/100 * 115764/100)); |
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} else { |
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volt_without_cks = (uint32_t)((2416794800U + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \
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(2625416 - (sclk_table->entries[i].clk/100) * (12586807/10000))); |
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volt_with_cks = (uint32_t)((2999656000U - sclk_table->entries[i].clk/100 * 392803 - (ro - 44) * 1000000) / \
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(3422454 - sclk_table->entries[i].clk/100 * (18886376/10000))); |
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} |
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if (volt_without_cks >= volt_with_cks) |
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volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks + |
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sclk_table->entries[i].cks_voffset) * 100 / 625) + 1); |
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sclk_table->entries[i].cks_voffset) * 100 + 624) / 625); |
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data->smc_state_table.Sclk_voltageOffset[i] = volt_offset; |
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} |
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data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 6; |
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/* Populate CKS Lookup Table */ |
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if (stretch_amount == 1 || stretch_amount == 2 || stretch_amount == 5) |
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stretch_amount2 = 0; |
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@ -2487,6 +2512,8 @@ int polaris10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) |
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PP_ASSERT_WITH_CODE((0 == tmp_result), |
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"Failed to enable VR hot GPIO interrupt!", result = tmp_result); |
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smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay); |
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tmp_result = polaris10_enable_sclk_control(hwmgr); |
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PP_ASSERT_WITH_CODE((0 == tmp_result), |
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"Failed to enable SCLK control!", result = tmp_result); |
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@ -2655,7 +2682,7 @@ static int polaris10_get_evv_voltages(struct pp_hwmgr *hwmgr) |
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{ |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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uint16_t vv_id; |
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uint16_t vddc = 0; |
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uint32_t vddc = 0; |
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uint16_t i, j; |
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uint32_t sclk = 0; |
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struct phm_ppt_v1_information *table_info = |
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@ -2686,8 +2713,9 @@ static int polaris10_get_evv_voltages(struct pp_hwmgr *hwmgr) |
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continue); |
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/* need to make sure vddc is less than 2v or else, it could burn the ASIC. */ |
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PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0), |
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/* need to make sure vddc is less than 2v or else, it could burn the ASIC.
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* real voltage level in unit of 0.01mv */ |
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PP_ASSERT_WITH_CODE((vddc < 200000 && vddc != 0), |
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"Invalid VDDC value", result = -EINVAL;); |
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/* the voltage should not be zero nor equal to leakage ID */ |
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@ -2913,6 +2941,31 @@ static int polaris10_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) |
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return 0; |
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} |
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int polaris10_patch_voltage_workaround(struct pp_hwmgr *hwmgr) |
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{ |
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struct phm_ppt_v1_information *table_info = |
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(struct phm_ppt_v1_information *)(hwmgr->pptable); |
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struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = |
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table_info->vdd_dep_on_mclk; |
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struct phm_ppt_v1_voltage_lookup_table *lookup_table = |
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table_info->vddc_lookup_table; |
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uint32_t i; |
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if (hwmgr->chip_id == CHIP_POLARIS10 && hwmgr->hw_revision == 0xC7) { |
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if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000) |
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return 0; |
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for (i = 0; i < lookup_table->count; i++) { |
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if (lookup_table->entries[i].us_vdd < 0xff01 && lookup_table->entries[i].us_vdd >= 1000) { |
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dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i; |
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return 0; |
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} |
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} |
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} |
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return 0; |
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} |
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int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) |
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{ |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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@ -2990,6 +3043,7 @@ int polaris10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) |
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polaris10_set_features_platform_caps(hwmgr); |
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polaris10_patch_voltage_workaround(hwmgr); |
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polaris10_init_dpm_defaults(hwmgr); |
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/* Get leakage voltage based on leakage ID. */ |
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@ -4359,6 +4413,15 @@ static int polaris10_notify_link_speed_change_after_state_change( |
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return 0; |
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} |
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static int polaris10_notify_smc_display(struct pp_hwmgr *hwmgr) |
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{ |
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struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend); |
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smum_send_msg_to_smc_with_parameter(hwmgr->smumgr, |
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(PPSMC_Msg)PPSMC_MSG_SetVBITimeout, data->frame_time_x2); |
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return (smum_send_msg_to_smc(hwmgr->smumgr, (PPSMC_Msg)PPSMC_HasDisplay) == 0) ? 0 : -EINVAL; |
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} |
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static int polaris10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) |
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{ |
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int tmp_result, result = 0; |
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@ -4407,6 +4470,11 @@ static int polaris10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *i |
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"Failed to program memory timing parameters!", |
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result = tmp_result); |
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tmp_result = polaris10_notify_smc_display(hwmgr); |
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PP_ASSERT_WITH_CODE((0 == tmp_result), |
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"Failed to notify smc display settings!", |
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result = tmp_result); |
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tmp_result = polaris10_unfreeze_sclk_mclk_dpm(hwmgr); |
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PP_ASSERT_WITH_CODE((0 == tmp_result), |
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"Failed to unfreeze SCLK MCLK DPM!", |
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@ -4441,6 +4509,7 @@ static int polaris10_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_ |
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PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm); |
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} |
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int polaris10_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display) |
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{ |
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PPSMC_Msg msg = has_display ? (PPSMC_Msg)PPSMC_HasDisplay : (PPSMC_Msg)PPSMC_NoDisplay; |
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@ -4460,8 +4529,6 @@ int polaris10_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwm |
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if (num_active_displays > 1) /* to do && (pHwMgr->pPECI->displayConfiguration.bMultiMonitorInSync != TRUE)) */ |
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polaris10_notify_smc_display_change(hwmgr, false); |
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else |
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polaris10_notify_smc_display_change(hwmgr, true); |
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return 0; |
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} |
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@ -4502,6 +4569,8 @@ int polaris10_program_display_gap(struct pp_hwmgr *hwmgr) |
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frame_time_in_us = 1000000 / refresh_rate; |
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pre_vbi_time_in_us = frame_time_in_us - 200 - mode_info.vblank_time_us; |
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data->frame_time_x2 = frame_time_in_us * 2 / 100; |
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display_gap2 = pre_vbi_time_in_us * (ref_clock / 100); |
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cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL2, display_gap2); |
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@ -4510,8 +4579,6 @@ int polaris10_program_display_gap(struct pp_hwmgr *hwmgr) |
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cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, data->soft_regs_start + offsetof(SMU74_SoftRegisters, VBlankTimeout), (frame_time_in_us - pre_vbi_time_in_us)); |
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polaris10_notify_smc_display_change(hwmgr, num_active_displays != 0); |
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return 0; |
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} |
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@ -4623,7 +4690,7 @@ int polaris10_upload_mc_firmware(struct pp_hwmgr *hwmgr) |
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return 0; |
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} |
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data->need_long_memory_training = true; |
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data->need_long_memory_training = false; |
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/*
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* PPMCME_FirmwareDescriptorEntry *pfd = NULL; |
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Trond Myklebust
9 years ago