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ARM: S3C24XX: header mach/regs-power.h local

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Since header mach/regs-power.h is used only into mach-s3c24xx/,
this patch moves the header file in local.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
tirimbino
Kukjin Kim 12 years ago
parent d3c01e7eab
commit 14cce0e775
7 changed files with 45 additions and 45 deletions
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  1. 40
      arch/arm/mach-s3c24xx/include/mach/regs-power.h
  2. 3
      arch/arm/mach-s3c24xx/irq-s3c2412.c
  3. 3
      arch/arm/mach-s3c24xx/mach-jive.c
  4. 2
      arch/arm/mach-s3c24xx/pm-s3c2412.c
  5. 3
      arch/arm/mach-s3c24xx/pm-s3c2416.c
  6. 37
      arch/arm/mach-s3c24xx/s3c2412-power.h
  7. 2
      arch/arm/mach-s3c24xx/s3c2412.c

40
arch/arm/mach-s3c24xx/include/mach/regs-power.h
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@ -1,40 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/regs-power.h
*
* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* S3C24XX power control register definitions
*/
#ifndef __ASM_ARM_REGS_PWR
#define __ASM_ARM_REGS_PWR __FILE__
#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR)
#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
#define S3C2412_PWRCFG_BATF_IRQ (1<<0)
#define S3C2412_PWRCFG_BATF_IGNORE (2<<0)
#define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
#define S3C2412_PWRCFG_BATF_MASK (3<<0)
#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0<<6)
#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1<<6)
#define S3C2412_PWRCFG_STANDBYWFI_STOP (2<<6)
#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3<<6)
#define S3C2412_PWRCFG_STANDBYWFI_MASK (3<<6)
#define S3C2412_PWRCFG_RTC_MASKIRQ (1<<8)
#define S3C2412_PWRCFG_NAND_NORST (1<<9)
#endif /* __ASM_ARM_REGS_PWR */

3
arch/arm/mach-s3c24xx/irq-s3c2412.c
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@ -33,12 +33,13 @@
#include <mach/regs-irq.h>
#include <mach/regs-gpio.h>
#include <mach/regs-power.h>
#include <plat/cpu.h>
#include <plat/irq.h>
#include <plat/pm.h>
#include "s3c2412-power.h"
#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
#define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0))))

3
arch/arm/mach-s3c24xx/mach-jive.c
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@ -35,7 +35,6 @@
#include <linux/platform_data/mtd-nand-s3c2410.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <mach/regs-power.h>
#include <mach/regs-gpio.h>
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
@ -56,6 +55,8 @@
#include <plat/pm.h>
#include <linux/platform_data/usb-s3c2410_udc.h>
#include "s3c2412-power.h"
static struct map_desc jive_iodesc[] __initdata = {
};

2
arch/arm/mach-s3c24xx/pm-s3c2412.c
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@ -26,13 +26,13 @@
#include <mach/hardware.h>
#include <mach/regs-gpio.h>
#include <mach/regs-power.h>
#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/s3c2412.h>
#include "regs-dsc.h"
#include "s3c2412-power.h"
extern void s3c2412_sleep_enter(void);

3
arch/arm/mach-s3c24xx/pm-s3c2416.c
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@ -16,12 +16,13 @@
#include <asm/cacheflush.h>
#include <mach/regs-power.h>
#include <mach/regs-s3c2443-clock.h>
#include <plat/cpu.h>
#include <plat/pm.h>
#include "s3c2412-power.h"
extern void s3c2412_sleep_enter(void);
static int s3c2416_cpu_suspend(unsigned long arg)

37
arch/arm/mach-s3c24xx/s3c2412-power.h
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@ -0,0 +1,37 @@
/*
* Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H
#define __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H __FILE__
#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR)
#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
#define S3C2412_PWRCFG_BATF_IRQ (1 << 0)
#define S3C2412_PWRCFG_BATF_IGNORE (2 << 0)
#define S3C2412_PWRCFG_BATF_SLEEP (3 << 0)
#define S3C2412_PWRCFG_BATF_MASK (3 << 0)
#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0 << 6)
#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1 << 6)
#define S3C2412_PWRCFG_STANDBYWFI_STOP (2 << 6)
#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3 << 6)
#define S3C2412_PWRCFG_STANDBYWFI_MASK (3 << 6)
#define S3C2412_PWRCFG_RTC_MASKIRQ (1 << 8)
#define S3C2412_PWRCFG_NAND_NORST (1 << 9)
#endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H */

2
arch/arm/mach-s3c24xx/s3c2412.c
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@ -34,7 +34,6 @@
#include <mach/hardware.h>
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <mach/regs-power.h>
#include <plat/clock.h>
#include <plat/cpu.h>
@ -49,6 +48,7 @@
#include "common.h"
#include "regs-dsc.h"
#include "s3c2412-power.h"
#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
#define S3C2412_SWRST_RESET (0x533C2412)

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